From 0c8e36095dac2a419ddb3403d6302bd7ed7541d1 Mon Sep 17 00:00:00 2001 From: TechnoPorg Date: Wed, 9 Sep 2026 13:59:41 -0400 Subject: [PATCH 1/4] RISC-V: Add zmmul target feature --- compiler/rustc_target/src/target_features.rs | 3 ++- library/std_detect/src/detect/arch/riscv.rs | 3 +++ library/std_detect/src/detect/os/riscv.rs | 2 ++ library/std_detect/tests/cpu-detection.rs | 1 + src/tools/rust-analyzer/crates/hir-ty/src/target_feature.rs | 1 + tests/ui/check-cfg/target_feature.stderr | 1 + 6 files changed, 10 insertions(+), 1 deletion(-) diff --git a/compiler/rustc_target/src/target_features.rs b/compiler/rustc_target/src/target_features.rs index 68ece92fbc9c0..d3f799efbdd4b 100644 --- a/compiler/rustc_target/src/target_features.rs +++ b/compiler/rustc_target/src/target_features.rs @@ -692,7 +692,7 @@ static RISCV_FEATURES: &[(&str, Stability, ImpliedFeatures)] = &[ }, &[], ), - ("m", Stable, &[]), + ("m", Stable, &["zmmul"]), ("relax", Unstable(sym::riscv_target_feature), &[]), ( "rva23u64", @@ -793,6 +793,7 @@ static RISCV_FEATURES: &[(&str, Stability, ImpliedFeatures)] = &[ ("zksed", Stable, &[]), ("zksh", Stable, &[]), ("zkt", Stable, &[]), + ("zmmul", Unstable(sym::riscv_target_feature), &[]), ("ztso", Stable, &[]), ("zvbb", Unstable(sym::riscv_target_feature), &["zvkb"]), // Zvbb ⊃ Zvkb ("zvbc", Unstable(sym::riscv_target_feature), &["zve64x"]), diff --git a/library/std_detect/src/detect/arch/riscv.rs b/library/std_detect/src/detect/arch/riscv.rs index 0e6bab512ac15..0fe37873b0bb9 100644 --- a/library/std_detect/src/detect/arch/riscv.rs +++ b/library/std_detect/src/detect/arch/riscv.rs @@ -104,6 +104,7 @@ features! { /// | `"zksed"` | Zksed | 6.8 | /// | `"zksh"` | Zksh | 6.8 | /// | `"zkt"` | Zkt | 6.8 | + /// | `"zmmul"` | Zmmul | Yes [^ima] [^dep] | /// | `"ztso"` | Ztso | 6.8 | /// | `"zvbb"` | Zvbb | 6.8 | /// | `"zvbc"` | Zvbc | 6.8 | @@ -220,6 +221,8 @@ features! { @FEATURE: #[stable(feature = "riscv_ratified", since = "1.78.0")] m: "m"; /// "M" Extension for Integer Multiplication and Division + @FEATURE: #[unstable(feature = "stdarch_riscv_feature_detection", issue = "111192")] zmmul: "zmmul"; + //// "Zmmul" Extension for Integer Multiplication @FEATURE: #[stable(feature = "riscv_ratified", since = "1.78.0")] a: "a"; /// "A" Extension for Atomic Instructions diff --git a/library/std_detect/src/detect/os/riscv.rs b/library/std_detect/src/detect/os/riscv.rs index 9b9e0cba09d1c..d4315f5cc1d87 100644 --- a/library/std_detect/src/detect/os/riscv.rs +++ b/library/std_detect/src/detect/os/riscv.rs @@ -147,6 +147,8 @@ pub(crate) fn imply_features(mut value: cache::Initializer) -> cache::Initialize imply!(zicntr | zihpm | f | zfinx | zve32x => zicsr); + imply!(m => zmmul); + // Loop until the feature flags converge. if prev == value { return value; diff --git a/library/std_detect/tests/cpu-detection.rs b/library/std_detect/tests/cpu-detection.rs index f0b276072108d..a381d84cfbbc3 100644 --- a/library/std_detect/tests/cpu-detection.rs +++ b/library/std_detect/tests/cpu-detection.rs @@ -243,6 +243,7 @@ fn riscv_linux() { println!("zicboz: {}", is_riscv_feature_detected!("zicboz")); println!("zicond: {}", is_riscv_feature_detected!("zicond")); println!("m: {}", is_riscv_feature_detected!("m")); + println!("zmmul: {}", is_riscv_feature_detected!("zmmul")); println!("a: {}", is_riscv_feature_detected!("a")); println!("zalrsc: {}", is_riscv_feature_detected!("zalrsc")); println!("zaamo: {}", is_riscv_feature_detected!("zaamo")); diff --git a/src/tools/rust-analyzer/crates/hir-ty/src/target_feature.rs b/src/tools/rust-analyzer/crates/hir-ty/src/target_feature.rs index 29a933f922630..7664d87cdee3e 100644 --- a/src/tools/rust-analyzer/crates/hir-ty/src/target_feature.rs +++ b/src/tools/rust-analyzer/crates/hir-ty/src/target_feature.rs @@ -204,6 +204,7 @@ const TARGET_FEATURE_IMPLICATIONS_RAW: &[(&str, &[&str])] = &[ // RISC-V ("a", &["zaamo", "zalrsc"]), ("d", &["f"]), + ("m", &["zmmul"]), ("zabha", &["zaamo"]), ("zdinx", &["zfinx"]), ("zfh", &["zfhmin"]), diff --git a/tests/ui/check-cfg/target_feature.stderr b/tests/ui/check-cfg/target_feature.stderr index 0d9aad0e4a193..13c49fe00ef1f 100644 --- a/tests/ui/check-cfg/target_feature.stderr +++ b/tests/ui/check-cfg/target_feature.stderr @@ -479,6 +479,7 @@ LL | cfg!(target_feature = "_UNEXPECTED_VALUE"); `zksed` `zksh` `zkt` +`zmmul` `zreg` `ztso` `zvbb` From 7a6e24abe1a27ce5e1465dacc57df9937461ef30 Mon Sep 17 00:00:00 2001 From: TechnoPorg Date: Thu, 10 Sep 2026 08:24:54 -0400 Subject: [PATCH 2/4] Document interaction between "m" and "zmmul" --- compiler/rustc_target/src/target_features.rs | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/compiler/rustc_target/src/target_features.rs b/compiler/rustc_target/src/target_features.rs index d3f799efbdd4b..97ec07f1a36e5 100644 --- a/compiler/rustc_target/src/target_features.rs +++ b/compiler/rustc_target/src/target_features.rs @@ -692,6 +692,14 @@ static RISCV_FEATURES: &[(&str, Stability, ImpliedFeatures)] = &[ }, &[], ), + // According to the RISC-V spec, the M ISA extension (integer multiplication/division) is supported only when the M bit + // of the misa register is 1, while Zmmul means integer multiplication is always supported, even on systems with a writable misa. + // + // The Rust/LLVM "m" target feature means something slightly different: with "m" enabled, it is expected that multiplication + // and division will be unconditionally available (M bit will always be 1 in misa); therefore, "m" implies "zmmul" in the context + // of target features. + // + // See discussion in the PR adding Zmmul: https://github.com/rust-lang/rust/pull/162552 ("m", Stable, &["zmmul"]), ("relax", Unstable(sym::riscv_target_feature), &[]), ( From d609aff297ea369fcab7142f3363bb1b197f5de0 Mon Sep 17 00:00:00 2001 From: TechnoPorg Date: Fri, 11 Sep 2026 08:40:48 -0400 Subject: [PATCH 3/4] Tweak wording of comment in target_features.rs --- compiler/rustc_target/src/target_features.rs | 7 +++---- 1 file changed, 3 insertions(+), 4 deletions(-) diff --git a/compiler/rustc_target/src/target_features.rs b/compiler/rustc_target/src/target_features.rs index 97ec07f1a36e5..e8970ea57e822 100644 --- a/compiler/rustc_target/src/target_features.rs +++ b/compiler/rustc_target/src/target_features.rs @@ -693,11 +693,10 @@ static RISCV_FEATURES: &[(&str, Stability, ImpliedFeatures)] = &[ &[], ), // According to the RISC-V spec, the M ISA extension (integer multiplication/division) is supported only when the M bit - // of the misa register is 1, while Zmmul means integer multiplication is always supported, even on systems with a writable misa. + // of the misa register is 1, while Zmmul means integer multiplication is always supported. // - // The Rust/LLVM "m" target feature means something slightly different: with "m" enabled, it is expected that multiplication - // and division will be unconditionally available (M bit will always be 1 in misa); therefore, "m" implies "zmmul" in the context - // of target features. + // The Rust/LLVM "m" target feature means something slightly different: with "m" enabled, it is assumed that integer + // multiplication and division will always be available (M bit will be 1 in misa), so "m" implies "zmmul". // // See discussion in the PR adding Zmmul: https://github.com/rust-lang/rust/pull/162552 ("m", Stable, &["zmmul"]), From a33e6eb2ca3b4bcb6479b7c94e85586216c26ff8 Mon Sep 17 00:00:00 2001 From: TechnoPorg Date: Fri, 11 Sep 2026 10:45:30 -0400 Subject: [PATCH 4/4] Address review comments --- library/std_detect/src/detect/arch/riscv.rs | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/library/std_detect/src/detect/arch/riscv.rs b/library/std_detect/src/detect/arch/riscv.rs index 0fe37873b0bb9..9e8648823e7a3 100644 --- a/library/std_detect/src/detect/arch/riscv.rs +++ b/library/std_detect/src/detect/arch/riscv.rs @@ -104,7 +104,7 @@ features! { /// | `"zksed"` | Zksed | 6.8 | /// | `"zksh"` | Zksh | 6.8 | /// | `"zkt"` | Zkt | 6.8 | - /// | `"zmmul"` | Zmmul | Yes [^ima] [^dep] | + /// | `"zmmul"` | Zmmul | No [^ima] [^dep] | /// | `"ztso"` | Ztso | 6.8 | /// | `"zvbb"` | Zvbb | 6.8 | /// | `"zvbc"` | Zvbc | 6.8 | @@ -222,7 +222,7 @@ features! { @FEATURE: #[stable(feature = "riscv_ratified", since = "1.78.0")] m: "m"; /// "M" Extension for Integer Multiplication and Division @FEATURE: #[unstable(feature = "stdarch_riscv_feature_detection", issue = "111192")] zmmul: "zmmul"; - //// "Zmmul" Extension for Integer Multiplication + /// "Zmmul" Extension for Integer Multiplication @FEATURE: #[stable(feature = "riscv_ratified", since = "1.78.0")] a: "a"; /// "A" Extension for Atomic Instructions