From ec511db5179fd3f398c898e391864240d8b8d8b8 Mon Sep 17 00:00:00 2001
From: Lux <iansseijelly@berkeley.edu>
Date: Fri, 21 Aug 2026 00:31:42 -0700
Subject: [PATCH] fix: use non-read-under-write decoder

---
 src/TacitConfigs.scala | 11 +++++++----
 tacit                  |  2 +-
 2 files changed, 8 insertions(+), 5 deletions(-)

diff --git a/src/TacitConfigs.scala b/src/TacitConfigs.scala
index 34b91db..51a64af 100644
--- a/src/TacitConfigs.scala
+++ b/src/TacitConfigs.scala
@@ -5,7 +5,7 @@ import org.chipsalliance.diplomacy.lazymodule.LazyModule
 import freechips.rocketchip.subsystem.{InSubsystem, RocketTileAttachParams, TilesLocated}
 import freechips.rocketchip.trace.{TraceCoreParams, TraceEncoderParams}
 import shuttle.common.ShuttleTileAttachParams
-import tacit.{TacitBPParams, TacitEncoder, TacitParallelEncoder}
+import tacit.{MPQueueImpl, TacitBPParams, TacitEncoder, TacitParallelEncoder}
 
 class WithTacitEncoder(
     encoderBaseAddr: BigInt = 0x03000000L,
@@ -52,7 +52,8 @@ class WithTacitEncoder(
 
 class WithTacitParallelEncoder(
     encoderBaseAddr: BigInt = 0x03000000L,
-    bufferDepth: Int = 16)
+    bufferDepth: Int = 16,
+    queueImpl: MPQueueImpl = MPQueueImpl.SRAM)
     extends Config((site, here, up) => {
   case TilesLocated(InSubsystem) => up(TilesLocated(InSubsystem), site).map {
     case tp: RocketTileAttachParams =>
@@ -63,7 +64,8 @@ class WithTacitParallelEncoder(
           buildEncoder = (p: Parameters) => LazyModule(new TacitParallelEncoder(
             new TraceCoreParams(nGroups = 1, xlen = xlen, iaddrWidth = xlen),
             bufferDepth = bufferDepth,
-            coreStages = 5)(p)),
+            coreStages = 5,
+            queueImpl = queueImpl)(p)),
           useArbiterMonitor = false,
           buildSinks = tp.tileParams.traceParams.map(_.buildSinks).getOrElse(Seq.empty)
         )),
@@ -80,7 +82,8 @@ class WithTacitParallelEncoder(
               xlen = xlen,
               iaddrWidth = xlen),
             bufferDepth = bufferDepth,
-            coreStages = 7)(p)),
+            coreStages = 7,
+            queueImpl = queueImpl)(p)),
           useArbiterMonitor = false,
           buildSinks = tp.tileParams.traceParams.map(_.buildSinks).getOrElse(Seq.empty)
         )),
diff --git a/tacit b/tacit
index 8ca1841..8e9db5b 160000
--- a/tacit
+++ b/tacit
@@ -1 +1 @@
-Subproject commit 8ca1841d4752c2b6e6942682bfb3f323417d71fd
+Subproject commit 8e9db5bc4d7b07f727368055115e57f192dbc798