diff --git a/CMakeLists.txt b/CMakeLists.txt
index d5db741..019befe 100644
--- a/CMakeLists.txt
+++ b/CMakeLists.txt
@@ -3,8 +3,8 @@ project(CNDS)
 
 set(CMAKE_POSITION_INDEPENDENT_CODE ON)
 
-set(CMAKE_C_STANDARD 17)
-set(CMAKE_CXX_STANDARD 17)
+set(CMAKE_C_STANDARD 20)
+set(CMAKE_CXX_STANDARD 20)
 
 find_package(Python 3.8 COMPONENTS Interpreter Development.Module REQUIRED)
 
diff --git a/cnds/cnds.cpp b/cnds/cnds.cpp
index 50afa4f..5500a1d 100644
--- a/cnds/cnds.cpp
+++ b/cnds/cnds.cpp
@@ -37,27 +37,27 @@ NB_MODULE(cnds, m) {
         .def("read_ram_u8", &Nds::readRamu8)
         .def("read_ram_u16", &Nds::readRamu16)
         .def("read_ram_u32", &Nds::readRamu32)
-        .def("read_ram_u64", &Nds::readRamu64)
+        // .def("read_ram_u64", &Nds::readRamu64)
         .def("read_ram_i8", &Nds::readRami8)
         .def("read_ram_i16", &Nds::readRami16)
         .def("read_ram_i32", &Nds::readRami32)
-        .def("read_ram_i64", &Nds::readRami64)
+        // .def("read_ram_i64", &Nds::readRami64)
         .def("read_ram_f32", &Nds::readRamf32)
-        .def("read_ram_f64", &Nds::readRamf64)
-        .def("read_map", &Nds::readMap)
+        // .def("read_ram_f64", &Nds::readRamf64)
+        // .def("read_map", &Nds::readMap)
 
         // Write memory methods
         .def("write_ram_u8", &Nds::writeRamu8)
         .def("write_ram_u16", &Nds::writeRamu16)
         .def("write_ram_u32", &Nds::writeRamu32)
-        .def("write_ram_u64", &Nds::writeRamu64)
+        // .def("write_ram_u64", &Nds::writeRamu64)
         .def("write_ram_i8", &Nds::writeRami8)
         .def("write_ram_i16", &Nds::writeRami16)
         .def("write_ram_i32", &Nds::writeRami32)
-        .def("write_ram_i64", &Nds::writeRami64)
-        .def("write_ram_f32", &Nds::writeRamf32)
-        .def("write_ram_f64", &Nds::writeRamf64)
-        .def("write_map", &Nds::writeMap);
+        // .def("write_ram_i64", &Nds::writeRami64)
+        .def("write_ram_f32", &Nds::writeRamf32);
+        // .def("write_ram_f64", &Nds::writeRamf64)
+        // .def("write_map", &Nds::writeMap);
 
     nb::class_<Config>(m, "config")
         .def_static("set_direct_boot", &Config::setDirectBoot, "Set direct boot mode")
diff --git a/cnds/include/nds.hpp b/cnds/include/nds.hpp
index 7925d7c..056edda 100644
--- a/cnds/include/nds.hpp
+++ b/cnds/include/nds.hpp
@@ -43,36 +43,36 @@ class Nds {
         void releaseKey(int key);
 
         // Read ram methods
-        uint8_t readRamu8(uint32_t address);
-        uint16_t readRamu16(uint32_t address);
-        uint32_t readRamu32(uint32_t address);
-        uint64_t readRamu64(uint32_t address);
+        uint8_t readRamu8(bool arm7, uint32_t address, bool tcm);
+        uint16_t readRamu16(bool arm7, uint32_t address, bool tcm);
+        uint32_t readRamu32(bool arm7, uint32_t address, bool tcm);
+        uint64_t readRamu64(bool arm7, uint32_t address, bool tcm);
 
-        int8_t readRami8(uint32_t address);
-        int16_t readRami16(uint32_t address);
-        int32_t readRami32(uint32_t address);
-        int64_t readRami64(uint32_t address);
+        int8_t readRami8(bool arm7, uint32_t address, bool tcm);
+        int16_t readRami16(bool arm7, uint32_t address, bool tcm);
+        int32_t readRami32(bool arm7, uint32_t address, bool tcm);
+        int64_t readRami64(bool arm7, uint32_t address, bool tcm);
 
-        float readRamf32(uint32_t address);
-        double readRamf64(uint32_t address);
+        float readRamf32(bool arm7, uint32_t address, bool tcm);
+        double readRamf64(bool arm7, uint32_t address, bool tcm);
 
-        std::vector<uint8_t> readMap(uint32_t sAddress, uint32_t eAddress);
+        // std::vector<uint8_t> readMap(uint32_t sAddress, uint32_t eAddress);
 
         // Write ram methods
-        void writeRamu8(uint32_t address, uint8_t value);
-        void writeRamu16(uint32_t address, uint16_t value);
-        void writeRamu32(uint32_t address, uint32_t value);
-        void writeRamu64(uint32_t address, uint64_t value);
+        void writeRamu8(bool arm7, uint32_t address, uint8_t value, bool tcm);
+        void writeRamu16(bool arm7, uint32_t address, uint16_t value, bool tcm);
+        void writeRamu32(bool arm7, uint32_t address, uint32_t value, bool tcm);
+        // void writeRamu64(bool arm7, uint32_t address, uint64_t value, bool tcm);
 
-        void writeRami8(uint32_t address, int8_t value);
-        void writeRami16(uint32_t address, int16_t value);
-        void writeRami32(uint32_t address, int32_t value);
-        void writeRami64(uint32_t address, int64_t value);
+        void writeRami8(bool arm7, uint32_t address, int8_t value, bool tcm);
+        void writeRami16(bool arm7, uint32_t address, int16_t value, bool tcm);
+        void writeRami32(bool arm7, uint32_t address, int32_t value, bool tcm);
+        // void writeRami64(bool arm7, uint32_t address, int64_t value, bool tcm);
 
-        void writeRamf32(uint32_t address, float value);
-        void writeRamf64(uint32_t address, double value);
+        void writeRamf32(bool arm7, uint32_t address, float value, bool tcm);
+        // void writeRamf64(bool arm7, uint32_t address, double value, bool tcm);
 
-        void writeMap(uint32_t sAddress, uint32_t size, const std::vector<uint8_t>& buffer);
+        // void writeMap(uint32_t sAddress, uint32_t size, const std::vector<uint8_t>& buffer);
 
     private:
         static const uint16_t GBA_WIDTH = 240;
diff --git a/cnds/nds_memory.cpp b/cnds/nds_memory.cpp
index 17c1014..26e73a1 100644
--- a/cnds/nds_memory.cpp
+++ b/cnds/nds_memory.cpp
@@ -1,95 +1,96 @@
 #include "nds.hpp"
+#include <bit>
 
 
 // Read memory methods
-uint8_t Nds::readRamu8(uint32_t address) {
-    return m_core->memory.readRam<uint8_t>(address);
+uint8_t Nds::readRamu8(bool arm7, uint32_t address, bool tcm) {
+    return m_core->memory.read<uint8_t>(arm7, address, tcm);
 }
 
-uint16_t Nds::readRamu16(uint32_t address) {
-    return m_core->memory.readRam<uint16_t>(address);
+uint16_t Nds::readRamu16(bool arm7, uint32_t address, bool tcm) {
+    return m_core->memory.read<uint16_t>(arm7, address, tcm);
 }
 
-uint32_t Nds::readRamu32(uint32_t address) {
-    return m_core->memory.readRam<uint32_t>(address);
+uint32_t Nds::readRamu32(bool arm7, uint32_t address, bool tcm) {
+    return m_core->memory.read<uint32_t>(arm7, address, tcm);
 }
 
-uint64_t Nds::readRamu64(uint32_t address) {
-    return m_core->memory.readRam<uint64_t>(address);
-}
+// uint64_t Nds::readRamu64(bool arm7, uint32_t address, bool tcm) {
+//     return m_core->memory.read<uint64_t>(arm7, address, tcm);
+// }
 
-int8_t Nds::readRami8(uint32_t address) {
-    return m_core->memory.readRam<int8_t>(address);
+int8_t Nds::readRami8(bool arm7, uint32_t address, bool tcm) {
+    return std::bit_cast<int8_t>(m_core->memory.read<uint8_t>(arm7, address, tcm));
 }
 
-int16_t Nds::readRami16(uint32_t address) {
-    return m_core->memory.readRam<int16_t>(address);
+int16_t Nds::readRami16(bool arm7, uint32_t address, bool tcm) {
+    return std::bit_cast<int16_t>(m_core->memory.read<uint16_t>(arm7, address, tcm));
 }
 
-int32_t Nds::readRami32(uint32_t address) {
-    return m_core->memory.readRam<int32_t>(address);
+int32_t Nds::readRami32(bool arm7, uint32_t address, bool tcm) {
+    return std::bit_cast<int32_t>(m_core->memory.read<uint32_t>(arm7, address, tcm));
 }
 
-int64_t Nds::readRami64(uint32_t address) {
-    return m_core->memory.readRam<int64_t>(address);
-}
+// int64_t Nds::readRami64(bool arm7, uint32_t address, bool tcm) {
+//     return std::bit_cast<int64_t>(m_core->memory.read<uint64_t>(arm7, address, tcm));
+// }
 
-float Nds::readRamf32(uint32_t address) {
-    return m_core->memory.readRam<float>(address);
+float Nds::readRamf32(bool arm7, uint32_t address, bool tcm) {
+    return std::bit_cast<float>(m_core->memory.read<uint32_t>(arm7, address, tcm));
 }
 
-double Nds::readRamf64(uint32_t address) {
-    return m_core->memory.readRam<double>(address);
-}
+// double Nds::readRamf64(bool arm7, uint32_t address, bool tcm) {
+//     return std::bit_cast<double>(m_core->memory.read<uint64_t>(arm7, address, tcm));
+// }
 
-std::vector<uint8_t> Nds::readMap(uint32_t sAddress, uint32_t eAddress) {
-    uint32_t size = eAddress - sAddress + 1;
-    std::vector<uint8_t> buffer(size);
-    m_core->memory.readMap(sAddress, eAddress, buffer.data());
-    return std::move(buffer);
-}
+// std::vector<uint8_t> Nds::readMap(uint32_t sAddress, uint32_t eAddress) {
+//     uint32_t size = eAddress - sAddress + 1;
+//     std::vector<uint8_t> buffer(size);
+//     m_core->memory.readMap(sAddress, eAddress, buffer.data());
+//     return std::move(buffer);
+// }
 
 // Write memory methods
-void Nds::writeRamu8(uint32_t address, uint8_t value) {
-    m_core->memory.writeRam<uint8_t>(address, value);
+void Nds::writeRamu8(bool arm7, uint32_t address, uint8_t value, bool tcm) {
+    m_core->memory.write<uint8_t>(arm7, address, value, tcm);
 }
 
-void Nds::writeRamu16(uint32_t address, uint16_t value) {
-    m_core->memory.writeRam<uint16_t>(address, value);
+void Nds::writeRamu16(bool arm7, uint32_t address, uint16_t value, bool tcm) {
+    m_core->memory.write<uint16_t>(arm7, address, value, tcm);
 }
 
-void Nds::writeRamu32(uint32_t address, uint32_t value) {
-    m_core->memory.writeRam<uint32_t>(address, value);
+void Nds::writeRamu32(bool arm7, uint32_t address, uint32_t value, bool tcm) {
+    m_core->memory.write<uint32_t>(arm7, address, value, tcm);
 }
 
-void Nds::writeRamu64(uint32_t address, uint64_t value) {
-    m_core->memory.writeRam<uint64_t>(address, value);
-}
+// void Nds::writeRamu64(bool arm7, uint32_t address, uint64_t value, bool tcm) {
+//     m_core->memory.write<uint64_t>(arm7, address, value, tcm);
+// }
 
-void Nds::writeRami8(uint32_t address, int8_t value) {
-    m_core->memory.writeRam<int8_t>(address, value);
+void Nds::writeRami8(bool arm7, uint32_t address, int8_t value, bool tcm) {
+    m_core->memory.write<uint8_t>(arm7, address, std::bit_cast<uint8_t>(value), tcm);
 }
 
-void Nds::writeRami16(uint32_t address, int16_t value) {
-    m_core->memory.writeRam<int16_t>(address, value);
+void Nds::writeRami16(bool arm7, uint32_t address, int16_t value, bool tcm) {
+    m_core->memory.write<uint16_t>(arm7, address, std::bit_cast<uint16_t>(value), tcm);
 }
 
-void Nds::writeRami32(uint32_t address, int32_t value) {
-    m_core->memory.writeRam<int32_t>(address, value);
+void Nds::writeRami32(bool arm7, uint32_t address, int32_t value, bool tcm) {
+    m_core->memory.write<uint32_t>(arm7, address, std::bit_cast<uint32_t>(value), tcm);
 }
 
-void Nds::writeRami64(uint32_t address, int64_t value) {
-    m_core->memory.writeRam<int64_t>(address, value);
-}
+// void Nds::writeRami64(bool arm7, uint32_t address, int64_t value, bool tcm) {
+//     m_core->memory.write<uint64_t>(arm7, address, std::bit_cast<uint64_t>(value), tcm);
+// }
 
-void Nds::writeRamf32(uint32_t address, float value) {
-    m_core->memory.writeRam<float>(address, value);
+void Nds::writeRamf32(bool arm7, uint32_t address, float value, bool tcm) {
+    m_core->memory.write<uint32_t>(arm7, address, std::bit_cast<uint32_t>(value), tcm);
 }
 
-void Nds::writeRamf64(uint32_t address, double value) {
-    m_core->memory.writeRam<double>(address, value);
-}
+// void Nds::writeRamf64(bool arm7, uint32_t address, double value, bool tcm) {
+//     m_core->memory.write<uint64_t>(arm7, address, std::bit_cast<uint64_t>(value), tcm);
+// }
 
-void Nds::writeMap(uint32_t sAddress, uint32_t size, const std::vector<uint8_t>& buffer) {
-    m_core->memory.writeMap(sAddress, size, buffer.data());
-}
+// void Nds::writeMap(uint32_t sAddress, uint32_t size, const std::vector<uint8_t>& buffer) {
+//     m_core->memory.writeMap(sAddress, size, buffer.data());
+// }
diff --git a/pynds/memory.py b/pynds/memory.py
index 420f76c..fd5674b 100644
--- a/pynds/memory.py
+++ b/pynds/memory.py
@@ -1,72 +1,71 @@
-
 class Memory:
     def __init__(self, nds):
         self._nds = nds
 
     # Read memory methods
-    def read_ram_u8(self, address: int) -> int:
-        return self._nds.read_ram_u8(address)
+    def read_u8(self, arm7: bool, address: int, tcm: bool = False) -> int:
+        return self._nds.read_ram_u8(arm7, address, tcm)
 
-    def read_ram_u16(self, address: int) -> int:
-        return self._nds.read_ram_u16(address)
+    def read_u16(self, arm7: bool, address: int, tcm: bool = False) -> int:
+        return self._nds.read_ram_u16(arm7, address, tcm)
 
-    def read_ram_u32(self, address: int) -> int:
-        return self._nds.read_ram_u32(address)
+    def read_u32(self, arm7: bool, address: int, tcm: bool = False) -> int:
+        return self._nds.read_ram_u32(arm7, address, tcm)
 
-    def read_ram_u64(self, address: int) -> int:
-        return self._nds.read_ram_u64(address)
+    # def read_u64(self, arm7: bool, address: int, tcm: bool = False) -> int:
+    #     return self._nds.read_ram_u64(arm7, address, tcm)
 
-    def read_ram_i8(self, address: int) -> int:
-        return self._nds.read_ram_i8(address)
+    def read_i8(self, arm7: bool, address: int, tcm: bool = False) -> int:
+        return self._nds.read_ram_i8(arm7, address, tcm)
 
-    def read_ram_i16(self, address: int) -> int:
-        return self._nds.read_ram_i16(address)
+    def read_i16(self, arm7: bool, address: int, tcm: bool = False) -> int:
+        return self._nds.read_ram_i16(arm7, address, tcm)
 
-    def read_ram_i32(self, address: int) -> int:
-        return self._nds.read_ram_i32(address)
+    def read_i32(self, arm7: bool, address: int, tcm: bool = False) -> int:
+        return self._nds.read_ram_i32(arm7, address, tcm)
 
-    def read_ram_i64(self, address: int) -> int:
-        return self._nds.read_ram_i64(address)
+    # def read_i64(self, arm7: bool, address: int, tcm: bool = False) -> int:
+    #     return self._nds.read_ram_i64(arm7, address, tcm)
 
-    def read_ram_f32(self, address: int) -> float:
-        return self._nds.read_ram_f32(address)
+    def read_f32(self, arm7: bool, address: int, tcm: bool = False) -> float:
+        return self._nds.read_ram_f32(arm7, address, tcm)
 
-    def read_ram_f64(self, address: int) -> float:
-        return self._nds.read_ram_f64(address)
+    # def read_f64(self, arm7: bool, address: int, tcm: bool = False) -> float:
+    #     return self._nds.read_ram_f64(arm7, address, tcm)
 
-    def read_map(self, start_address: int, end_address: int) -> list:
-        return self._nds.read_map(start_address, end_address)
+    # def read_map(self, start_address: int, end_address: int) -> list:
+    #     return self._nds.read_map(start_address, end_address)
 
     # Write memory methods
-    def write_ram_u8(self, address: int, value: int) -> None:
-        self._nds.write_ram_u8(address, value)
+    def write_u8(self, arm7: bool, address: int, value: int, tcm: bool = False) -> None:
+        self._nds.write_ram_u8(arm7, address, value, tcm)
 
-    def write_ram_u16(self, address: int, value: int) -> None:
-        self._nds.write_ram_u16(address, value)
+    def write_u16(self, arm7: bool, address: int, value: int, tcm: bool = False) -> None:
+        self._nds.write_ram_u16(arm7, address, value, tcm)
 
-    def write_ram_u32(self, address: int, value: int) -> None:
-        self._nds.write_ram_u32(address, value)
+    def write_u32(self, arm7: bool, address: int, value: int, tcm: bool = False) -> None:
+        self._nds.write_ram_u32(arm7, address, value, tcm)
 
-    def write_ram_u64(self, address: int, value: int) -> None:
-        self._nds.write_ram_u64(address, value)
+    # def write_u64(self, arm7: bool, address: int, value: int, tcm: bool = False) -> None:
+    #     self._nds.write_ram_u64(arm7, address, value, tcm)
 
-    def write_ram_i8(self, address: int, value: int) -> None:
-        self._nds.write_ram_i8(address, value)
+    def write_i8(self, arm7: bool, address: int, value: int, tcm: bool = False) -> None:
+        self._nds.write_ram_i8(arm7, address, value, tcm)
 
-    def write_ram_i16(self, address: int, value: int) -> None:
-        self._nds.write_ram_i16(address, value)
+    def write_i16(self, arm7: bool, address: int, value: int, tcm: bool = False) -> None:
+        self._nds.write_ram_i16(arm7, address, value, tcm)
 
-    def write_ram_i32(self, address: int, value: int) -> None:
-        self._nds.write_ram_i32(address, value)
+    def write_i32(self, arm7: bool, address: int, value: int, tcm: bool = False) -> None:
+        self._nds.write_ram_i32(arm7, address, value, tcm)
 
-    def write_ram_i64(self, address: int, value: int) -> None:
-        self._nds.write_ram_i64(address, value)
+    # def write_i64(self, arm7: bool, address: int, value: int, tcm: bool = False) -> None:
+    #     self._nds.write_ram_i64(arm7, address, value, tcm)
 
-    def write_ram_f32(self, address: int, value: float) -> None:
-        self._nds.write_ram_f32(address, value)
+    def write_f32(self, arm7: bool, address: int, value: float, tcm: bool = False) -> None:
+        self._nds.write_ram_f32(arm7, address, value, tcm)
 
-    def write_ram_f64(self, address: int, value: float) -> None:
-        self._nds.write_ram_f64(address, value)
+    # def write_f64(self, arm7: bool, address: int, value: float, tcm: bool = False) -> None:
+    #     self._nds.write_ram_f64(arm7, address, value, tcm)
 
-    def write_map(self, start_address: int, data: list) -> None:
-        self._nds.write_map(start_address, data)
+    # def write_map(self, start_address: int, size: int, data: list) -> None:
+    #     self._nds.write_map(start_address, size, data)