C11 project built from scratch with zero external dependencies.

This project focuses on resource optimization (Time and space complexity). It simulates a industrial production line, handling order logistics, ingredient expiration dates, and courier scheduling.

• ⚡ Performance: Implemented Hash Maps and Priority Queues to achieve O(n) time complexity for critical operations.
• 🧠 Memory Management: Manual memory handling (malloc/free) profiled with Valgrind to ensure zero memory leaks.

• 🔒 Private repo — university policy prevents publishing the assignment spec and bundled third-party rulebook. Happy to share access on request: 8bqh7b7dh@mozmail.com

Final project ("Prova Finale") for Software Engineering — a full client/server implementation of the board game, with TUI, JavaFX GUI, RMI & Socket networking, and game-state persistence, built with 3 teammates.

• My Role: Test Engineer & GUI Developer.
• Contribution: Authored part of the project's JUnit test suite: the shipboard tile model, danger-penalty resolution, and controller state transitions, surfacing edge cases in the adventure-card engine before integration. Built out major sections of the JavaFX client (building, fixing, flighting, and planet views).
• Tech: Java JavaFX RMI Socket/TCP MVC JUnit

Final project ("Prova Finale") for Logic Networks — a memory-mapped FSMD hardware module in VHDL, developed in pairs with Mirco Poma.

• My Role: Co-Designer & Co-Developer.
• Contribution: Designed the 11-state FSM + datapath architecture, implemented the shift-based fixed-point normalization with sign-aware rounding for the filter math, and validated the design in simulation against the official course testbench.
• Tech: VHDL Xilinx Vivado Digital Logic FSM Design

• 💼 [LinkedIn](Coming Soon)
• 📧 Email - 8bqh7b7dh@mozmail.com