Skip to content

Fix DDR5 SPD misidentification as DDR4 - #12

Open
chenx-dust wants to merge 1 commit into
Blacktempel:masterfrom
chenx-dust:fix/ddr5-spd-detection
Open

chenx-dust wants to merge 1 commit into
Blacktempel:masterfrom
chenx-dust:fix/ddr5-spd-detection

Conversation

@chenx-dust

@chenx-dust chenx-dust commented Sep 28, 2026 •

Copy link
Copy Markdown

DDR5 hubs expose their device revision at offset 0x02, where DDR4 EEPROMs store the memory type. A revision such as 0x10 can therefore be mistaken for LPDDR4 by the DDR4-first detection path.

Extract the existing SPD5118 identity check into a shared read-only helper and use it to exclude DDR5 hubs from DDR4 detection. Verify the hub identity before DDR5 page selection to avoid treating a non-DDR5 EEPROM byte as MR11. Keep the existing detection order, retry logic, and failure logging.

Assisted by GPT 6 Astra

@Blacktempel

Copy link
Copy Markdown
Owner

Thank you for your PR.
Due to many upcoming changes all non-critical PRs for this repository will currently be put on hold.
Your change will be reviewed and considered for a patch version, when possible.

@Blacktempel Blacktempel added the on hold Waiting for something (e.g. user reply) label Sep 28, 2026
@chenx-dust

Copy link
Copy Markdown
Author

Thank you for your PR. Due to many upcoming changes all non-critical PRs for this repository will currently be put on hold. Your change will be reviewed and considered for a patch version, when possible.

I understand. However, the bug fixed by this PR is a critical issue that incorrectly identifies DDR5 memory as DDR4, which has affected the proper operation of downstream applications, e.g. librehardwaremonitor. I hope this issue can be resolved as soon as possible. Thank you! :)

Sign up for free to join this conversation on GitHub. Already have an account? Sign in to comment

Labels

on hold Waiting for something (e.g. user reply)

Projects

None yet

Development

Successfully merging this pull request may close these issues.

2 participants