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Vulkan backend - #232
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Vulkan backend#232
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Honor buffer view offsets, support unsigned integer textures and bindless texture descriptors, and handle empty buffers and Release driver errors. Correct CUDA builtin header copying, AST function scope/cache invalidation, and OpenGL buffer registration. Preserve host callback/download-to-upload ordering, release callback captures outside CUDA driver callbacks, and drain retained resources on synchronization. Include shared RHI/DSL fixes for view offsets, managed references, integer textures, and diagnostic resource cleanup before device destruction. Add CUDA AST/IR regressions for resource layouts, texture formats, stream lifetime, and host transfer ordering, with standalone CTest registration. Validation before splitting the working tree: Release and Debug each passed 95/95 tests, including 42 CUDA tests per configuration. OpenGL interop was not exercised. Vulkan implementation and performance benchmark changes are excluded from this commit.
Fix Vulkan build integration, AST/IR Slang generation, resource access, math behavior, and stream/transfer ordering for CUDA parity. Reduce dispatch overhead with inline shader parameters, per-batch shader binding reuse, streamlined batch retirement, and narrower barriers. Register cross-backend AST/IR regressions and add parameter layout, texture transfer, stream ordering, and verified performance coverage. Validation: Release and Debug builds; 95/95 CTest cases in each build; Vulkan validation and synchronization validation; 66/66 SPIR-V modules; verified CUDA/Vulkan performance runs on RTX 2080.
Match sampling frames, matrix construction and array math; align texture bounds, raygen dispatch and acceleration structure lifetime. Add deterministic box rendering, texture and runtime parity regressions across both backends and codegen paths. Verify emitted function identities in the existing CUDA source test instead of optional diagnostic comments. Validation: Debug non-Tensor CTest 106/106; Release affected regressions 17/17; 127 unique SPIR-V modules passed spirv-val. CUDA backend implementation remains unchanged.
Fix byte-buffer atomic references, signed remainder, and half rounding while preserving half bit copies. Add dispatch, math, control-flow, atomic, and bindless regressions across CUDA/Vulkan and AST/IR. Retain standalone diagnostics for CUDA zero dispatch and wide-literal subtraction without changing the CUDA implementation. Validation: Release 118/118, Debug 24/24, and 132 SPIR-V modules passed. No Vulkan validation or synchronization errors.
Preserve Callable storage aliases, texture alpha and raw-bit reinterpretation, and half conversion and math semantics. Correct resource offsets, dispatch handling, acceleration structures, and concurrent shader invocation lifetimes with targeted CUDA fixes. Add capability probes and cross-backend regression coverage. Release and Debug each pass all 195 non-Tensor tests, with 2364 deterministic comparison rows showing no differences per configuration, no Vulkan validation messages, and 413 SPIR-V modules validated.
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