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Add TensorRT deployment and latency benchmarks - #4

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Maelic merged 9 commits into
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feat/tensorrt-support
Sep 23, 2026
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Maelic merged 9 commits into
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feat/tensorrt-support

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@Maelic Maelic commented Sep 22, 2026 •

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Adds native TensorRT 10 deployment for the relation model, addressing #2. Users can build local FP32 engines and run the image/webcam demo with --backend tensorrt, or use TensorRTRelationHead with their own boxes. Vocabulary selection, calibration and spatial/semantic decoding share the ONNX implementation. GPU dependencies remain optional.

The README leads with a runnable example, model selection and deployment choices, uses Figure 2 from arXiv:2609.12552v1 with attribution, and keeps just two generated latency highlights for the recommended model. Full runtime/detector comparisons, hardware conditions, p95 and methodology live in the linked benchmark docs. Research and dataset details also link to dedicated pages.

Completed GPU comparison

  • 17,280 timed calls across 96 configurations on the RTX 3080 Laptop GPU: ViT-S, ViT-S+ and ViT-B; PyTorch FP32/BF16, ONNX CUDA FP32 and TensorRT FP32; 35 and 243 predicates. Three shuffled rounds per configuration, six photos, batch one.
  • Relation-only measurements include preprocessing, transfers and decoding. The detector-inclusive comparison adds COCO YOLO26m, YOLO-World v2-m and YOLOE-26m, measuring detection, relations, decoding and the total on every call. Detectors remain PyTorch FP32 with the recorded default NMS settings; YOLOE segmentation computation is included while relations consume boxes.
  • TensorRT totals for ViT-S+ at 35 predicates: yolo26m.pt: 36.50 ms; yolov8m-worldv2.pt: 36.07 ms; yoloe-26m-seg.pt: 43.48 ms. TensorRT is fastest for ViT-S/S+; PyTorch BF16 is fastest for ViT-B in these measurements. BF16 accuracy was not evaluated.
  • Every block began at or below 70°C; all reported a 90 W enforced power limit and zero thermal slowdown counter increase. Cooling waits, loading, prompt encoding and setup are excluded. These are warm serial latencies, not sustained video throughput. Host CPU activity was not isolated and is documented.
  • README medians and detailed median/p95 and stage tables are generated from raw samples. Raw JSON, gzip files, logs and engines stay in ignored local experiment directories; the repository contains benchmark code and readable reports. Generators accept a local result file through --source. Earlier negative findings remain documented in Markdown.

Sparse-input correction

The detector preflight found duplicate valid pairs in ONNX Runtime CUDA when the sampler padded with the dtype minimum. Changing the masked selection sentinel fixes the sparse-input case without changing learned weights. A CUDA regression test covers empty, singleton, sparse and dense inputs. All three ONNX graphs and TensorRT engines used for the new measurements were rebuilt from the released EMA checkpoints. The failed preflight is documented, with its diagnostic output retained locally, and contributes no timing samples.

Validation

  • 107 CPU tests pass after the artifact cleanup, with three CUDA tests skipped on the CPU run. All three CUDA tests passed separately during GPU validation; the deployment and benchmark execution code is unchanged by the cleanup.
  • 315 engine comparisons against CPU ONNX, with identical valid pair sets; maximum absolute logit difference 0.000314236 (atol=1e-3, rtol=1e-4).
  • 288 FP32 GPU preflight comparisons across all timing inputs and both vocabularies; maximum absolute logit difference 0.008907795 (atol=1e-2, rtol=1e-4).
  • Independent NumPy audit of all raw medians, p95s, stage statistics and round medians; artifact hashes, sampling coverage and thermal telemetry verified. Both documentation generators pass --check against the retained local results; local links, formatting and git diff --check pass.
  • CPU CI covers Python 3.12/3.13. Small synthetic records test the reporting logic and publishing guards without requiring GPU artifacts. The guards reject incomplete or inconsistent end-to-end evidence.

TensorRT scope: FP32 with TF32 disabled; engines are built on the target GPU. Jetson and reduced-precision TensorRT remain unvalidated. No detector weights are redistributed.

Closes #2.

@Maelic Maelic mentioned this pull request Sep 22, 2026
@Maelic Maelic changed the title Add TensorRT deployment and use the paper architecture figure Add TensorRT deployment and refresh the README with measured latency Sep 22, 2026
@Maelic Maelic changed the title Add TensorRT deployment and refresh the README with measured latency Add TensorRT deployment and benchmark all released checkpoints Sep 22, 2026
@Maelic Maelic changed the title Add TensorRT deployment and benchmark all released checkpoints Add TensorRT deployment and latency benchmarks Sep 22, 2026
@Maelic
Maelic marked this pull request as ready for review September 23, 2026 04:47
@Maelic
Maelic merged commit 4a07de9 into main Sep 23, 2026
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TensorRT support

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