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cuda: use the float4 RMS norm path by default, with a pinned rounding order - #418
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The upstream merge kept the scalar CUDA RMS reduction as the default and the float4 path behind GGML_CUDA_RMS_NORM_VECTOR=1. Make the float4 path the default (GGML_CUDA_RMS_NORM_VECTOR=0 restores the scalar order) and pin its rounding order (sum of squares, row scale, multiply-add) with explicit intrinsics, so fused kernels can reproduce it bit for bit.
…da/rms-norm-vec-default
…s exact With the float4 RMS norm path as the default, the tail kernel needs the same reduction order to stay bit-identical. Add a float4 variant that mirrors rms_norm_f32's float4 path (pinned sums and row scales), and fuse a tail only when all of its norms take the same path at a width the fused kernel reproduces.
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Depends on #352 (stacked on its branch; the diff here is one commit).
What
Why
is faster on every model we measured, and the output change is small (below).
sum / ncols + epsand the sum of squares could round differently in different template instances.Pinning the order makes the path reproducible, so fused kernels that include an RMS norm can match it bit for bit.
How
rms_norm_vector_enabled()), used by the existing dispatch. No other kernels change.Testing
2.9e-4 (99.2%, PPL ratio 1.0013 +- 0.0004). With GGML_CUDA_RMS_NORM_VECTOR=0 the output is identical to Merge upstream master (d854d98ba) into prism #352.
516.2 -> 534.0 (+3.4%). Models whose norms do not go through the fused norm + Hadamard kernels gain the most (up to about
+7% decode). Prefill +0.3-2.5%.