Feature/compute only platform v2

.gitignore

@@ -80,6 +80,11 @@ driver/kcompat/.scratch/
 # VBIN build directories
 *.prj
 
+# Root design build outputs
+/linker/install.prj.compute/
+/linker/slashkit/resources/static_shell/
+/linker/slashkit/resources/static_shell_compute/
+
 # Python virtual environment
 .venv
 

docs/explanation/pcie-topology.rst

@@ -19,7 +19,7 @@ Physical Functions
    │                                          │
    │   PF0 (.0)      PF1 (.1)      PF2 (.2)  │
    │   ami           slash_qdma    slash_ctl   │
-   │   0x50B4        0x50B5        0x50B6      │
+   │   0x50B4        0x50C1        0x50C2      │
    │   Management    DMA           BAR MMIO    │
    └──────────────────────────────────────────┘
 
@@ -39,20 +39,27 @@ Physical Functions
      - AVED management interface — sensor readings, board identity, firmware
        version.
    * - PF1
-     - ``0x50B5``
+     - ``0x50C1``
      - ``slash_qdma``
      - ``/dev/slash_qdma_ctl<N>``
      - Queue-based DMA subsystem — H2C and C2H data transfers for buffers and
        streaming.
    * - PF2
-     - ``0x50B6``
+     - ``0x50C2``
      - ``slash_ctl``
      - ``/dev/slash_ctl<N>``
      - BAR MMIO access — kernel register reads and writes via memory-mapped
        I/O.
 
 All three PFs share vendor ID ``0x10EE`` (AMD/Xilinx).
 
+.. note::
+
+   ``0x50C1`` (PF1) and ``0x50C2`` (PF2) are the current device IDs. For
+   backward compatibility the ``slash`` driver and ``v80-smi`` also accept the
+   legacy IDs ``0x50B5`` (PF1) and ``0x50B6`` (PF2) — plus the AVED/V80P QDMA
+   ID ``0x50BD`` — so cards still carrying an older bitstream continue to work.
+
 BDF Addressing
 ==============
 
@@ -79,7 +86,7 @@ Device Discovery
 1. Enumerate ``/sys/bus/pci/devices/`` for entries with vendor ``0x10EE`` and
    device ``0x50B4`` (PF0).
 2. Extract the board BDF from the matching entry.
-3. Verify that companion functions PF1 (``0x50B5``) and PF2 (``0x50B6``)
+3. Verify that companion functions PF1 (``0x50C1``) and PF2 (``0x50C2``)
    exist at the same bus and device.
 4. Check that the correct kernel driver is bound to each function by
    inspecting the ``driver`` symlink in sysfs.
@@ -102,10 +109,10 @@ Readiness Checks
      - ``ami`` driver bound to ``0x50B4``
      - AMI management driver not loaded
    * - **PF1**
-     - ``slash_qdma`` driver bound to ``0x50B5``
+     - ``slash_qdma`` driver bound to ``0x50C1``
      - QDMA driver not loaded
    * - **PF2**
-     - ``slash_ctl`` driver bound to ``0x50B6``
+     - ``slash_ctl`` driver bound to ``0x50C2``
      - Control driver not loaded
    * - **VRTD**
      - Daemon has registered the board

docs/explanation/vrtbin-format.rst

@@ -76,6 +76,7 @@ Schema
 
    <SystemMap>
      <Platform>Hardware</Platform>
+     <ShellType>service</ShellType>
      <ClockFrequency>250000000</ClockFrequency>
 
      <ServiceLayer>
@@ -115,6 +116,12 @@ Key elements:
    One of ``Hardware``, ``Emulation``, or ``Simulation``. VRT maps this to
    the ``vrt::Platform`` enum and selects the appropriate back-end.
 
+``<ShellType>``
+   Hardware shell required by the design. Hardware vbins use ``service`` or
+   ``compute``. VRT passes this to ``vrtd`` before programming so the daemon
+   can reset the board to the matching boot partition when needed. Legacy
+   vbins without this element are treated as ``service``.
+
 ``<ClockFrequency>``
    Kernel clock frequency in Hz (e.g. ``250000000`` for 250 MHz).
 

docs/reference/kernel-abi/index.rst

@@ -33,12 +33,12 @@ may change when the module is unloaded and loaded again.
 
 ``/dev/slash_ctl<N>`` / ``/sys/class/slash/slash_ctl_<BDF>/device``
     Provides BAR enumeration, MMIO access, and PCI device identity. Associated with PF2 (device ID
-    ``10EE:50B6``). Examples: ``/dev/slash_ctl0``, ``/dev/slash_ctl1``,
+    ``10EE:50C2``). Examples: ``/dev/slash_ctl0``, ``/dev/slash_ctl1``,
     ``/sys/class/slash/slash_ctl_0000:61:00.2/device``.
 
 ``/dev/slash_qdma_ctl<N>`` / ``/sys/class/slash/slash_qdma_ctl_<BDF>/device``
     Manages DMA queue pairs for bulk data movement between host and card memory, as well as
-    reconfiguration. Associated with PF1 (device ID ``10EE:50B5``). Examples: ``/dev/slash_qdma_ctl0``,
+    reconfiguration. Associated with PF1 (device ID ``10EE:50C1``). Examples: ``/dev/slash_qdma_ctl0``,
     ``/dev/slash_qdma_ctl1``, ``/sys/class/slash/slash_qdma_ctl_0000:61:00.1/device``.
 
 ``/dev/slash_hotplug`` / ``/sys/class/slash/slash_hotplug``
@@ -111,7 +111,7 @@ matching QDMA control device.
 
 - **Device file name:** ``/dev/slash_ctl<N>`` (e.g. ``/dev/slash_ctl0``)
 - **Sysfs name:** ``slash_ctl_<PCI-BDF>`` (e.g., ``/sys/class/slash/slash_ctl_0000:61:00.2``)
-- **Associated PCI function:** PF2, device ID ``10EE:50B6``
+- **Associated PCI function:** PF2, device ID ``10EE:50C2``
 - **Permissions:** ``0600`` (owner read/write)
 - **Creation:** one per card, created when PF2 is probed during module load or PCI rescan
 - **File operations:** ``open``, ``release``, and ``ioctl`` — no ``read``, ``write``, or ``mmap``
@@ -135,7 +135,7 @@ the BAR is present and usable for MMIO, its physical address, and its size.
     struct slash_ioctl_device_info dev_info = { .size = sizeof(dev_info) };
     ioctl(ctl_fd, SLASH_CTLDEV_IOCTL_GET_DEVICE_INFO, &dev_info);
     /* dev_info.bdf → e.g. "0000:61:00.2" */
-    /* dev_info.vendor_id == 0x10EE, dev_info.device_id == 0x50B6 */
+    /* dev_info.vendor_id == 0x10EE, dev_info.device_id == 0x50C2 */
 
     /* Enumerate all six BARs */
     for (int i = 0; i < 6; i++) {
@@ -312,7 +312,7 @@ fd with a physical board and with the matching QDMA control device.
         __u32 size;                   /* [in/out] ABI version */
         char  bdf[SLASH_PCI_BDF_LEN]; /* [out] PCI BDF string, NUL-terminated, e.g. "0000:61:00.2" */
         __u16 vendor_id;              /* [out] PCI vendor ID (0x10EE for AMD/Xilinx) */
-        __u16 device_id;              /* [out] PCI device ID (0x50B6 for PF2) */
+        __u16 device_id;              /* [out] PCI device ID (0x50C2 for PF2) */
         __u16 subsystem_vendor_id;    /* [out] PCI subsystem vendor ID */
         __u16 subsystem_device_id;    /* [out] PCI subsystem device ID */
     };
@@ -351,7 +351,7 @@ buffer, buffer offset, device-side physical address, length, and direction.
 
 - **Device file name:** ``/dev/slash_qdma_ctl<N>`` (e.g. ``/dev/slash_qdma_ctl0``)
 - **Sysfs name:** ``slash_qdma_ctl_<PCI-BDF>`` (e.g. ``/sys/class/slash/slash_qdma_ctl_0000:61:00.1``)
-- **Associated PCI function:** PF1, device ID ``10EE:50B5``
+- **Associated PCI function:** PF1, device ID ``10EE:50C1``
 - **Permissions:** ``0600``
 - **Creation:** one per card, created when PF1 is probed
 - **File operations:** ``open``, ``release``, ``ioctl`` on the control fd. DMA I/O is done on

docs/reference/smi/commands.rst

@@ -141,12 +141,17 @@ bus reset and rescan (hotplug) sequence.
 
 .. code-block:: text
 
-   v80-smi reset -d <BDF>
+   v80-smi reset -d <BDF> [--shell-type <service|compute>]
 
 .. option:: -d, --device <BDF>
 
    Board address. **Required.**
 
+.. option:: --shell-type <service|compute>
+
+   Shell to boot after reset. ``service`` selects boot partition 0 and
+   ``compute`` selects boot partition 1. Defaults to ``service``.
+
 write-static-shell
 ------------------
 

docs/tutorials/admin/platform-setup.rst

@@ -367,14 +367,17 @@ Each V80 board exposes three PCI functions:
      - ``ami``
      - AVED management interface
    * - PF1
-     - ``0x50B5``
+     - ``0x50C1``
      - ``slash_qdma``
      - Queue-based DMA subsystem
    * - PF2
-     - ``0x50B6``
+     - ``0x50C2``
      - ``slash_ctl``
      - BAR MMIO access (register reads/writes)
 
+The legacy device IDs ``0x50B5`` (PF1) and ``0x50B6`` (PF2) are still accepted
+as a fallback for cards carrying a pre-compute-platform bitstream.
+
 For boards already visible over PCIe, check that all three functions appear
 with their drivers bound:
 

driver/slash_config.h

@@ -23,15 +23,19 @@
  *
  * The SLASH design exposes two PCI physical functions per card:
  *
- *   - **PF1** (device 0x50B5, or 0x50BD on AVED/V80P designs) — QDMA
- *     function.  Hosts the Xilinx QDMA IP used for high-throughput DMA
- *     transfers between host memory and the FPGA fabric.
+ *   - **PF1** (device 0x50C1) — QDMA function.  Hosts the Xilinx QDMA
+ *     IP used for high-throughput DMA transfers between host memory and
+ *     the FPGA fabric.
  *
- *   - **PF2** (device 0x50B6) — Control function.  Exposes PCI BARs
+ *   - **PF2** (device 0x50C2) — Control function.  Exposes PCI BARs
  *     that the host can mmap for register-level MMIO access to the
  *     FPGA design.
  *
  * Both functions share vendor ID 0x10EE (AMD/Xilinx).
+ *
+ * For backward compatibility the driver also binds the legacy device IDs
+ * used by pre-compute-platform designs (PF1 0x50B5, PF2 0x50B6) and the
+ * AVED/V80P QDMA function (0x50BD).  New designs should use 0x50C1/0x50C2.
  */
 
 #ifndef SLASH_CONFIG_H
@@ -42,7 +46,9 @@
 /** AMD/Xilinx PCI vendor ID. */
 #define SLASH_PCIE_VENDOR_ID 0x10EE
 /** PCI device ID for the V80 SLASH control function. */
-#define SLASH_PCIE_DEVICE_ID 0x50B6
+#define SLASH_PCIE_DEVICE_ID 0x50C2
+/** Legacy PCI device ID for the control function (pre-compute-platform designs). */
+#define SLASH_PCIE_DEVICE_ID_LEGACY 0x50B6
 /** Physical function number for the control/BAR-access interface. */
 #define SLASH_PCIE_PF 2
 
@@ -51,7 +57,9 @@
 /** AMD/Xilinx PCI vendor ID (same as control function). */
 #define SLASH_QDMA_PCI_VENDOR_ID 0x10EE
 /** PCI device ID for the V80 SLASH QDMA function. */
-#define SLASH_QDMA_PCI_DEVICE_ID 0x50B5
+#define SLASH_QDMA_PCI_DEVICE_ID 0x50C1
+/** Legacy PCI device ID for the QDMA function (pre-compute-platform designs). */
+#define SLASH_QDMA_PCI_DEVICE_ID_LEGACY 0x50B5
 /** PCI device ID for the V80P/AVED QDMA function. */
 #define SLASH_AVED_QDMA_PCI_DEVICE_ID 0x50BD
 /** Physical function number for the QDMA DMA engine. */

driver/slash_pcie.c

@@ -17,14 +17,15 @@
  *
  * PCI driver for the SLASH control function (PF2).
  *
- * This driver binds to PCI device 10EE:50B6 (the V80 SLASH control
- * function).  On probe it creates a control device (slash_ctldev) that
+ * This driver binds to PCI device 10EE:50C2 (the V80 SLASH control
+ * function), or the legacy 10EE:50B6 used by pre-compute-platform
+ * designs.  On probe it creates a control device (slash_ctldev) that
  * exposes BAR information and dma-buf-backed BAR mappings to userspace,
  * and registers the device with the hotplug subsystem so that it can
  * be removed/reset/rescanned during FPGA reconfiguration.
  *
- * PF1 (the QDMA function, device 10EE:50B5) is handled by a separate
- * PCI driver registered in slash_qdma.c.
+ * PF1 (the QDMA function, device 10EE:50C1, or legacy 10EE:50B5) is
+ * handled by a separate PCI driver registered in slash_qdma.c.
  */
 
 #include "slash_pcie.h"
@@ -39,9 +40,10 @@
 static int slash_pcie_probe(struct pci_dev *pdev, const struct pci_device_id *id);
 static void slash_pcie_remove(struct pci_dev *pdev);
 
-/* Match only the SLASH control function (PF2, device 0x50B6). */
+/* Match the SLASH control function (PF2): new 0x50C2, or legacy 0x50B6. */
 static const struct pci_device_id slash_pcie_ids[] = {
     {PCI_DEVICE(SLASH_PCIE_VENDOR_ID, SLASH_PCIE_DEVICE_ID)},
+    {PCI_DEVICE(SLASH_PCIE_VENDOR_ID, SLASH_PCIE_DEVICE_ID_LEGACY)},
     {0,}
 };
 MODULE_DEVICE_TABLE(pci, slash_pcie_ids);

driver/slash_qdma.c

@@ -23,9 +23,9 @@
  * to provide queue-pair-based DMA transfers between host memory and the
  * FPGA fabric.
  *
- * The QDMA subsystem binds to PF1 (PCI device ID 0x50B5, or 0x50BD on
- * AVED/V80P designs), while the control device (slash_ctldev) binds to
- * PF2 (device ID 0x50B6).
+ * The QDMA subsystem binds to PF1 (PCI device ID 0x50C1, or the legacy
+ * 0x50B5 / AVED 0x50BD), while the control device (slash_ctldev) binds to
+ * PF2 (device ID 0x50C2, or the legacy 0x50B6).
  *
  * Queue pair lifecycle:
  *   add -> start -> I/O (via anon_inode fd) -> stop -> del
@@ -723,11 +723,13 @@ static void slash_qdma_ioctl_info(struct slash_qdma_dev *qdma_dev,
 /**
  * slash_qdma_ids - PCI device ID table for the QDMA PF.
  *
- * Matches PF1 QDMA functions on AMD/Xilinx V80 cards, including the
- * AVED/V80P device ID.
+ * Matches the PF1 QDMA function on AMD/Xilinx V80 cards: the current
+ * 0x50C1, the legacy 0x50B5 used by pre-compute-platform designs, and
+ * the AVED/V80P 0x50BD.
  */
 static const struct pci_device_id slash_qdma_ids[] = {
     {PCI_DEVICE(SLASH_QDMA_PCI_VENDOR_ID, SLASH_QDMA_PCI_DEVICE_ID)},
+    {PCI_DEVICE(SLASH_QDMA_PCI_VENDOR_ID, SLASH_QDMA_PCI_DEVICE_ID_LEGACY)},
     {PCI_DEVICE(SLASH_QDMA_PCI_VENDOR_ID, SLASH_AVED_QDMA_PCI_DEVICE_ID)},
     {0,}
 };

driver/tests/slash_test_helpers.h

@@ -40,8 +40,8 @@
 
 /* Documented PCI identity for SLASH cards. */
 #define SLASH_TEST_VENDOR_ID 0x10EE
-#define SLASH_TEST_PF1_DEV_ID 0x50B5 /* QDMA */
-#define SLASH_TEST_PF2_DEV_ID 0x50B6 /* Control */
+#define SLASH_TEST_PF1_DEV_ID 0x50C1 /* QDMA */
+#define SLASH_TEST_PF2_DEV_ID 0x50C2 /* Control */
 
 /*
  * 16 TB NoC interconnect address map regions, from

linker/slashkit/__main__.py

@@ -38,7 +38,13 @@
 from slashkit.emit.emu.project_gen import build_emu_project, package_emu_artifacts
 
 from slashkit.emit.metadata.prog_image import build_vbin
-from slashkit.core.command_config import LinkerConfiguration, Platform, InstallerConfiguration, CommandConfiguration
+from slashkit.core.command_config import (
+    LinkerConfiguration,
+    Platform,
+    InstallerConfiguration,
+    CommandConfiguration,
+    ShellType,
+)
 
 
 def _format_duration(seconds: float) -> str:
@@ -79,6 +85,7 @@ def _sample_cpu_peak() -> None:
 
     try:
         import resource
+
         start_rusage = resource.getrusage(resource.RUSAGE_SELF)
     except Exception:
         start_rusage = None
@@ -102,6 +109,7 @@ def _sample_cpu_peak() -> None:
         if start_rusage is not None:
             try:
                 import resource
+
                 end_rusage = resource.getrusage(resource.RUSAGE_SELF)
                 # ru_maxrss is in kilobytes on Linux; convert to MB.
                 rss_mb = end_rusage.ru_maxrss / 1024.0
@@ -132,11 +140,10 @@ def link(config: LinkerConfiguration) -> None:
         build_emu_project(config)
     else:
         run_with_profiling("build_slash", lambda: build_slash_rm(config))
-        # Only build a service layer if ethernet is enabled
-        # Will be changed once more service layers become available
-        if config.networking_enabled:
-            run_with_profiling("build_service_layer",
-                               lambda: build_service_layer_rm(config))
+        if config.shell_type == ShellType.SERVICE and config.networking_enabled:
+            run_with_profiling(
+                "build_service_layer", lambda: build_service_layer_rm(config)
+            )
 
     if config.platform == Platform.SIMULATION:
         pass
@@ -150,8 +157,9 @@ def link(config: LinkerConfiguration) -> None:
 def static_shell_path(args) -> None:
     file_name = "amd_v80_gen5x8_25.1_nofpt.pdi" if args.nofpt else \
         "amd_v80_gen5x8_25.1.pdi"
-    traversable = resources.files(
-        "slashkit.resources.static_shell") / file_name
+    package = "slashkit.resources.static_shell_compute" \
+        if args.shell_type == "compute" else "slashkit.resources.static_shell"
+    traversable = resources.files(package) / file_name
 
     with resources.as_file(traversable) as path:
         if not path.is_file():
@@ -177,8 +185,12 @@ def main():
         format="%(asctime)s %(levelname)s %(name)s:%(funcName)s: %(message)s",
     )
 
-    ap = argparse.ArgumentParser(description="Utility to link VRT binaries (VBINs) from user IP cores.", conflict_handler="resolve", epilog=MAIN_HELP_EPILOG,
-                                 formatter_class=argparse.RawDescriptionHelpFormatter)
+    ap = argparse.ArgumentParser(
+        description="Utility to link VRT binaries (VBINs) from user IP cores.",
+        conflict_handler="resolve",
+        epilog=MAIN_HELP_EPILOG,
+        formatter_class=argparse.RawDescriptionHelpFormatter,
+    )
     sub_parsers = ap.add_subparsers(required=True)
 
     link_parser = sub_parsers.add_parser("link")
@@ -188,14 +200,18 @@ def main():
     install_parser = sub_parsers.add_parser("install")
     InstallerConfiguration.populate_argument_parser(install_parser)
     install_parser.set_defaults(
-        config_class=InstallerConfiguration, operation=install_static_shell)
+        config_class=InstallerConfiguration, operation=install_static_shell
+    )
 
     static_shell_path_parser = sub_parsers.add_parser(
         "static-shell-path",
         help="Print the installed static shell PDI path")
     static_shell_path_parser.add_argument(
         "--nofpt", action="store_true",
         help="Print the no-FPT PDI path used for JTAG programming")
+    static_shell_path_parser.add_argument(
+        "--shell-type", choices=("service", "compute"), default="service",
+        help="Shell type to resolve (default: service)")
     static_shell_path_parser.set_defaults(
         config_class=None, operation=static_shell_path)