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[Metal] Audit M5 reach and preserve deferred suite timing evidence - #600

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Refs #520. The user explicitly deferred the long retry and plans to connect AC power. Draft: the remaining GPU n20/chi512 and post-controls still need an uncontended run. Do not close the issue or treat the partial campaign as a benchmark pass.

The historical M5 report mislabeled Criterion's displayed point estimates as medians and described n29–31 as merely untested, although the Metal SV API already capped at n28. This follow-up preserves the October tables, recovers their available local raw statistics, corrects the estimator description (mean for Flat, slope for Linear), and records the exact public/device reach boundary.

On the real M5, 82 release Metal tests passed. The existing ignored large-chi512 norm test was explicitly run for n16 and n20: 1 passed in 241.39 s at its original 2e-3 norm tolerance. The new read-only example executes n28 GHZ, scans all amplitudes for finiteness, checks both peaks/full norm (0.9999999657714582), and verifies n29 is rejected before allocation with limit 28. It queries maxBufferLength and recommended working set without overriding the cap, widening the state or forcing OOM. The policy cap existed in the published October revision too.

A frozen runner then used prebuilt unchanged benchmarks, 10 samples, separate Criterion homes, timestamped events and 10-second power/load logging. Thirteen early cells completed: SV random-n18 controls, readout, layer batching and CPU n20/chi512. While the GPU target collected samples, external Java/emulator work saturated the CPU (0% idle, load 27.74 on 10 cores) and memory compression rose to 7421M. Only our identified benchmark child was interrupted. All partial data and the admission reason are preserved. The GPU has no completed estimate/sample set and post-controls did not run. The strict summarizer rejects this incomplete campaign; its estimated collection time is not reported as a measured result.

The attempt was battery-only and is explicitly separate from the October mixed/uncertain AC history. Existing M3/M4/M5 columns are historical evidence, not a controlled chip-generation comparison. A 36-file source comparison anchors the production MPS path/bench at measured base ae537ad, while acknowledging that recovered mtimes do not reconstruct the old binary/compiler/power state. No thermal cause is inferred from timings or from pmset reporting no recorded warning.

Validation: Metal/all-target and workspace Clippy, beta Metal Clippy, formatting, report links/checksums, plus explicit rejection of the incomplete campaign. This branch integrates merged #599; normal production execution, guards and precision remain unchanged. The actual missing-cell/drift gate remains open until a roughly 45–50-minute quiet-Mac window permits a clean retry.

Report: docs/perf/metal-m5.md, linked from docs/perf/metal.md. Evidence/protocol: docs/perf/data/metal-m5-520/. Reproduction helpers: scripts/python/bench_metal_m5_followup.py, scripts/python/summarize_metal_m5_followup.py, and crates/aleph-metal/examples/metal_m5_audit.rs.

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