Document Revision 1 direct-drive CAD baseline - #5
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Establish the final recommended first-build electrical architecture and the self-contained handoff a downstream model uses to draw the printable US-Letter-landscape wiring blueprint. Evidence resolved this pass: - The exact AD8317 module schematic closes every open detector question: R2 = 0R is fitted, hard-wiring VOUT to VSET, so the board is permanently in measurement mode; there is no onboard regulator, only a series diode and an LC filter, so VPOS is ~4.3-4.7 V from a 5.00 V rail; J2 is a 2-pin Vout + GND output header; R6 = 1k is already in series with the output; Valt is a dead pad. Expected output is 0.35-1.9 V, which closes the ADC overvoltage hazard. - The exact YEJMKJ listing makes BLACK A+/GREEN A-/RED B+/BLUE B- the authoritative coil map rather than an assumption. - The ELEGOO pinout art confirms VP/VN/RX2/TX2 pad names and that D21/D22 are free - there is no rear OLED on this board. Build decisions recorded: - Six 5 A blade fuses; logical branches A-D plus two spare ways. - TILT UART RX moves off GPIO39 to D22 (GPIO22), removing the documented SAR-ADC glitch erratum from the design rather than working around it. - Both TMC2209 drivers at UART address 0, MS1+MS2 linked locally to each module's own GND pad - safe because each driver has its own UART peripheral, and it makes both modules wire identically for a direct-solder build. - Direct-solder build philosophy; driver pocket access is an installation-order note, not an electrical constraint. All sixteen v1.0 VERIFY items are now closed by evidence, closed by build decision, reduced to one of five printed pre-power checks, tracked as firmware reconciliation, or explicitly out of blueprint scope. Four genuinely unresolved items remain, none of which affects a drawn connection. Firmware was read, not modified. The seven required firmware and documentation changes are queued in FIRMWARE-WIRING-RECONCILIATION.md for a later controlled task, per the project's firmware-reconciliation rule. Superseded prompt-builder drafts are banner-marked in place rather than moved, preserving the photo library's internal references and their provenance. Co-Authored-By: Claude Opus 5 <noreply@anthropic.com>
Process the 2026-08-23 current-build batch (18 HEIC, IMG_5538-IMG_5555): originals archived byte-for-byte with SHA-256 verification, a full-resolution JPG derivative beside each, and 23 descriptive copies filed into the existing categories 01, 04, 05, 06, 08, 09 and 10. Every filename retains its IMG_####. The photo library itself stays untracked; only the Markdown is versioned. Three as-built facts the photographs establish: - The copper ground bus (#3) is BUILT and installed in its own tray pocket between the two bucks. Bare dead-soft copper returns are already soldered to both buck VIN- pads, with one longer run leaving the tray for battery negative. This confirms W06/W09/W10 as documented and adds a real assembly hazard: those returns are uninsulated. - The fuse block is photographed with every fitted fuse marked 5, closing the one outstanding request for a picture of the 5 A build state. - The moving conductors are stored as a service loop coiled inside the blue rotating drum, which is now named as the slack strategy. One electrical fact changed, on direct photographic evidence: an SMA-terminated coax jumper is now plugged into the AD8317 RF_IN, superseding the direct-threaded AUT. What the far end terminates in is not visible in any photograph, so it is recorded as open question RF-Q1 and the blueprint is told to label it "RF TERMINATION - CONFIRM BEFORE BUILD" rather than invent a bulkhead. Newly received RG316 coax and SMA panel connectors are recorded as inventory only. Everything else is confirmed rather than contradicted: power tree, ground tree, buck roles and 5.00 V outputs, ESP32 pin map, the two-driver independent-UART address-0 strategy, the motor colour map, and fuse architecture are unchanged. Component IDs 01-17 and connection IDs W01-W41 + RF01 are preserved for later node-based visualization. The handoff now points the blueprint creator at these photographs as the preferred visual reference, with a table naming the best image per purpose. Co-Authored-By: Claude Opus 5 <noreply@anthropic.com>
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Summary
Validation
git diff --checkpassedNotes
Direct drive is selected for Revision 1 but remains subject to low-acceleration prototype validation. This PR does not change GPIO assignments or firmware behavior.