docs: devlog draft for the M3/M4 sprint (voice pass pending)

[jackthepunished]

Autonomous-tick item 3: devlog draft covering the baseline measurement, M3 software stack, M4 RTL + synthesis numbers, and the process findings. DELIBERATELY LEFT UNMERGED - Bahadir does the voice pass and merges. Facts cross-checked against git log and the tick brief; the DRAFT marker line should be removed during the pass.

Summary by CodeRabbit

• Documentation
  • Added a sprint log documenting software infrastructure and RTL implementation progress.
  • Recorded denoising benchmarks, calibration and quantization work, hardware verification results, synthesis metrics, and resolved evaluation issues.
  • Included end-to-end hardware-model validation outcomes and plans for the next milestone.

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ℹ️ Recent review info

⚙️ Run configuration

Configuration used: defaults

Review profile: CHILL

Plan: Pro Plus

Run ID: 617d04da-2ad8-4162-92b1-05924d016758

📥 Commits

Reviewing files that changed from the base of the PR and between 0cfc32b and 3000fef.

📒 Files selected for processing (1)

• devlog/2026-08-08-m3-m4-sprint.md

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📝 Walkthrough

Walkthrough

The sprint log documents M3 quantized-model infrastructure, M4 streaming RTL implementation, verification and synthesis results, correction of a stale-bias training-gate failure, end-to-end validation, and M5 plans.

Changes

M3/M4 Sprint

Layer / File(s)	Summary
M3 quantization and baseline validation devlog/2026-08-08-m3-m4-sprint.md	The log records baseline denoising metrics and the M3 dataset, calibration, QAT, integer-bias, and export workflow.
M4 RTL and synthesis verification devlog/2026-08-08-m3-m4-sprint.md	The log describes the streaming RTL architecture, bit-exact checks, throughput, synthesis results, LUT costs, and verification-process corrections.
Training gate and hardware-model validation devlog/2026-08-08-m3-m4-sprint.md	The log documents the stale-bias gate failure, arithmetic-only correction, regression test, trained-model export, and Verilator agreement.
M5 implementation plans devlog/2026-08-08-m3-m4-sprint.md	The log lists plans for renderer hardware-in-the-loop integration, BRAM-based weight storage, synthesis measurements, and board deployment.

Estimated code review effort: 2 (Simple) | ~10 minutes

Possibly related PRs

• jackthepunished/ternoise#1: Documents the M3 plan and related training, calibration, denoising-gate, and export work.

🚥 Pre-merge checks | ✅ 5

✅ Passed checks (5 passed)

Check name	Status	Explanation
Description Check	✅ Passed	Check skipped - CodeRabbit’s high-level summary is enabled.
Title check	✅ Passed	The title clearly identifies the documentation change and the M3/M4 sprint devlog draft.
Docstring Coverage	✅ Passed	No functions found in the changed files to evaluate docstring coverage. Skipping docstring coverage check.
Linked Issues check	✅ Passed	Check skipped because no linked issues were found for this pull request.
Out of Scope Changes check	✅ Passed	Check skipped because no linked issues were found for this pull request.

✨ Finishing Touches

🧪 Generate unit tests (beta)

• Create PR with unit tests
• Commit unit tests in branch devlog-m3-m4

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[jackthepunished]

Draft updated with the full arc: the +5.81 near-miss, the stale-bias_int diagnosis and fix (now in train.py with tests), the +6.76 pass, and the trained 256px frame through the RTL at 17.22 cyc/px. Still awaiting the voice pass - the DRAFT marker line comes out when you merge.