LATX, fix: Complete FP state handling across signals - #489
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Linux starts a signal handler with initialized user floating-point state after saving the interrupted state in its signal frame. FNINIT alone leaves MXCSR and vector registers inherited from the interrupted code, in addition to leaving LATX's host register copies stale. Initialize the supported user FP components after either signal frame has been saved successfully. Reset LATX's FCSR and x87 mode and reload mapped vector registers without changing the saved interrupted state. Tests: - Native x86 and LATX i386 legacy/rt and x86_64 rt signal fixtures - x87 entry, rounding, MMX restore, MXCSR and XMM/YMM entry/restore - Hard-float and LATX_SOFTFPU=1/2 Signed-off-by: Wenqiang Wei <weiwenqiang@mail.ustc.edu.cn>
The canonical MMX image has TOP zero as well as valid tags and 0xffff exponents. Checking only the latter two properties misclassifies legal x87 state with nonzero TOP, so the next signal delivery canonicalizes that state as MMX and corrupts TOP. Require zero TOP before selecting MMX mode. Add a signal-frame round-trip test with nonzero TOP and all-valid NaNs; the next frame must retain the restored TOP without intervening FP code. Tests: - Native i386/x86_64 signal-frame round trips - LATX hard-float and LATX_SOFTFPU=1/2: fails before, passes after - Existing x87, MMX, MXCSR and XMM/YMM signal regressions Signed-off-by: Wenqiang Wei <weiwenqiang@mail.ustc.edu.cn>
LATX_SOFTFPU keeps pending exceptions in fp_status rather than FCSR. Signal frame creation previously wrote only the architectural x87 status, so soft-float exceptions were lost. Sigreturn also failed to rebuild fp_status from restored x87 flags. Synchronize fp_status into the x87 status before creating a frame and reconstruct it after restoring x87 state. Tests: - i386 and x86_64 precision, denormal, and handler-isolation signal cases with LATX_SOFTFPU=1/2 Signed-off-by: Wenqiang Wei <weiwenqiang@mail.ustc.edu.cn>
Sigreturn must rebuild LATX FCSR with the same exception-enable policy used by translated x87 control-word updates. When LATX_ENABLE_FCSR_EXC is set, force invalid, divide-by-zero, overflow and underflow enables while keeping precision disabled. Otherwise mirror the guest x87 masks. Tests: - Signal/x87 regression matrix with LATX_ENABLE_FCSR_EXC enabled - Source truth-table comparison with translated FLDCW handling Signed-off-by: Wenqiang Wei <weiwenqiang@mail.ustc.edu.cn>
Translated hard-float x87 and SSE operations share the LoongArch FCSR sticky flags. Treating every pending bit as x87 state contaminated FSW with SSE exceptions and left MXCSR incomplete. Track the guest FP domain that owns pending FCSR flags. Archive flags at each x87 boundary, route final flags to FSW or MXCSR before saving a signal frame, and keep restored x87 flags out of the shared FCSR. Tests: - i386 and x86_64 x87, SSE, and mixed-domain signal cases - Dynamic, TU, and AOT generate/load paths with FCSR exceptions on/off Signed-off-by: Wenqiang Wei <weiwenqiang@mail.ustc.edu.cn>
The hard-float correctness path places an FCSR archive pair around each x87 instruction. Consecutive x87 instructions use the same guest FP domain, so intermediate archive and reload pairs do not change state. Emit synchronization only at the start and end of each contiguous x87 region, while retaining per-instruction boundaries for isolated x87 operations. Tests: - i386 and x86_64 signal/FCSR matrix with dynamic, TU, and AOT paths Signed-off-by: Wenqiang Wei <weiwenqiang@mail.ustc.edu.cn>
LoongArch build hosts do not necessarily provide an x86-capable linker, so the signal regression runner could not exercise LATX there even when prebuilt guest binaries were available. Accept LATX_SIGNAL_GUEST_DIR and reuse executable test guests from that directory. The default compile-and-run behavior remains unchanged. Tests: - Signal regression runner on 58 with prebuilt x86_64, i386, and i386 legacy guests Signed-off-by: Wenqiang Wei <weiwenqiang@mail.ustc.edu.cn>
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Summary / 变更说明
Follow up on #436 and complete the Linux signal FP-state semantics for LATX.
after the interrupted state has been saved, while keeping sigreturn
restoration intact.
signal delivery.
so x87 FSW and SSE MXCSR do not contaminate each other.
x87 control-word updates.
optimization, and allow the signal runner to reuse prebuilt x86 guests on
LoongArch build hosts.
The series is organized as seven independently reviewable patches: five
correctness fixes, one x87-region optimization, and one test-infrastructure
change.
Validation / 验证
Validated on the LoongArch 58 host:
latx-i386andlatx-x86_64successfully.LATX_SOFTFPU=1/2.dynamic, TU, and AOT cases passed.
failures across x86_64, i386 rt, and i386 legacy frames.
LATX_SOFTFPU=0/1/2, TU on/off, and FCSR exceptions on/off.git diff --checkpassed. Checkpatch reported 0 errors and 5 existingtest-only warnings (the new-file MAINTAINERS prompt and architecture guards
used by the shared i386/x86_64 fixture).
Checklist / 检查项
CONTRIBUTING.md. / 我已阅读CONTRIBUTING.md。git commit -s). /每个提交都包含 DCO 签署（
git commit -s）。are not applicable. /
我已提供相关构建或测试结果，或说明了不适用的原因。