In college, busy.
Dual-enrolled ECE student & hobby computer architect. Built nano-rv32i RISC-V core for Tang Nano 20K FPGA. Interested in zero-overhead abstractions, silicon sec
- North Carolina
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06:12
(UTC -04:00) - https://socraticsilicon.substack.com
Highlights
- Pro
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nano-rv32i
nano-rv32i PublicThis is where I am putting first RISC-V RV32I single-cycle processor (in development)
SystemVerilog 1
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rvem
rvem Public archiveA simple C++ cycle-accurate RV32I Unpriveleged Emulator for an educational project.
C++
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FinalProject
FinalProject PublicThis is the final project for my BoeBot. It contains two programs: One called wall-e.ino and one called dashboard.ino
C++
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