Switch to native assembly implementations of mix and hash

[mkeeter]

As always, it's annoying to write but a significant speedup versus main:

# main  
$ ./target/release/fidget-cli render2d -i models/terrain.rhai --size=1024 -N50 -oout.png --eval=jit
[2026-08-16T17:39:28Z INFO  fidget_cli] Loaded file in 3.36975ms
[2026-08-16T17:39:28Z INFO  fidget_cli] Built shape in 185.625µs
[2026-08-16T17:39:28Z INFO  fidget_cli] Rendered 50× at 13.30 ms/frame

# this branch
$ ./target/release/fidget-cli render2d -i models/terrain.rhai --size=1024 -N50 -oout.png --eval=jit
[2026-08-16T17:39:18Z INFO  fidget_cli] Loaded file in 3.271792ms
[2026-08-16T17:39:18Z INFO  fidget_cli] Built shape in 167.75µs
[2026-08-16T17:39:19Z INFO  fidget_cli] Rendered 50× at 9.68 ms/frame

[Copilot]

Pull request overview

Replaces callback-based rand and mix evaluation with native x86_64 and AArch64 JIT assembly.

Changes:

• Implements scalar and SIMD hashing directly in assembly.
• Adds interval validation and fallback handling.
• Improves interval-test diagnostics.

Reviewed changes

Copilot reviewed 9 out of 11 changed files in this pull request and generated 6 comments.

Show a summary per file

File	Description
fidget-jit/src/x86_64/point.rs	Adds scalar native hashing.
fidget-jit/src/x86_64/interval.rs	Adds interval-aware native hashing.
fidget-jit/src/x86_64/grad_slice.rs	Adds gradient native hashing.
fidget-jit/src/x86_64/float_slice.rs	Adds AVX2 vectorized hashing.
fidget-jit/src/aarch64/point.rs	Adds scalar NEON hashing.
fidget-jit/src/aarch64/interval.rs	Adds interval-aware NEON hashing.
fidget-jit/src/aarch64/grad_slice.rs	Adds gradient native hashing.
fidget-jit/src/aarch64/float_slice.rs	Adds vectorized NEON hashing.
fidget-core/src/eval/test/interval.rs	Adds assertion diagnostics.

Suppressed comments (4)

fidget-jit/src/x86_64/interval.rs:572

• This numerical equality check also accepts rhs bounds -0.0 and +0.0, although Interval::mix rejects bounds with different to_bits() values. Such a non-singleton rhs is incorrectly hashed; use an integer comparison of the two lanes before the NaN check.

            // check rhs.lower == rhs.upper (which also checks that they aren't NaN)
            ; vpshufd xmm1, Rx(reg(rhs_reg)), 0b11111101u8 as i8 // xmm1 = rhs.upper
            ; vcomiss xmm1, Rx(reg(rhs_reg))
            ; jp >N
            ; jne >N

fidget-jit/src/x86_64/point.rs:437

• This mix implementation emits BMI2-only shrx instructions even though the x86_64 JIT contract checks only for AVX2 (fidget-jit/build.rs:10-16). On an AVX2 CPU or VM without BMI2, evaluating mix will fault. Replace the variable shifts with instructions covered by the supported baseline, or explicitly detect and require BMI2.

            ; shrx    r10d, r9d, r8d

fidget-jit/src/x86_64/grad_slice.rs:470

• This gradient mix path also introduces BMI2-only shrx under an AVX2-only host requirement. AVX2 does not guarantee BMI2, so the generated function can fault on a supported CPU/VM. Avoid BMI2 in both rounds or add consistent BMI2 gating for the x86_64 JIT.

            ; shrx    r10d, r9d, r8d

fidget-jit/src/x86_64/interval.rs:634

• The interval rand singleton path likewise uses BMI2-only shrx despite the crate's AVX2-only feature check. This can produce an illegal instruction on a host that satisfies the advertised requirement. Replace this shift with baseline/AVX2 instructions or gate the entire x86_64 JIT on BMI2.

            ; shrx    r9d, r9d, r8d

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