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QCLINUX: arm64: dts: qcom: lemans and monaco: Rework RTSS Mailbox DT to use syscon and staging overlays - #1768

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QCLINUX: arm64: dts: qcom: lemans and monaco: Rework RTSS Mailbox DT to use syscon and staging overlays#1768
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@sargarram7 sargarram7 commented Sep 5, 2026

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Target milestone: QLI-2.1

Summary

Reworks the RTSS Mailbox device-tree support on Lemans and Monaco to address maintainers review feedback on the original design merged via #1327: syscon-based TCSR access, staging-overlay consolidation, and removal of the standalone RTSS-only DTBOs.

Impact

  • Adds ipcc1-4 + syscon nodes to lemans.dtsi/monaco.dtsi (base DTB - always compiled in, no overlay needed).
  • Adds 3 reserved-memory regions to monaco.dtsi (also base DTB).
  • Adds rtss_mailbox node to lemans-staging.dtso/monaco-staging.dtso (*-staging.dtbo overlay - applied at FIT-assembly
    time for configs that include the staging overlay, per the existing FIT config).
  • Removes lemans-rtss-mb.dtso/monaco-rtss-mb.dtso + Makefile entries.

Unchanged

  • No changes to any other subsystem/driver/DT node outside Impact files.

Related PRs

Tracking issue: qualcomm-linux/meta-qcom#3085

This is part of a set of PRs bringing the RTSS mailbox stack into the open-source tree:

RTSS interface enablement is handled using a staging DTBO overlay to carry the rtss mailbox node, both bootup and DTBO patching with it applied have been verified on target.

Testing

  • Sanity tested on lemans and monaco targets.

Change Request

CRs-Fixed: 4668068

RTSS Feature Enablement Exception

https://jira-dc.qualcomm.com/jira/browse/QLIJIRA-123

@sargarram7

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Author

Dmitry Baryshkov (@lumag), Ricardo Salveti (@ricardosalveti), Nicolas Dechesne (@ndechesne), Viswanath Kraleti (@vkraleti), Komal Bajaj (@Komal-Bajaj) would you please review the changes.
Really appreciate your review and feedback on this - the PR description and the context comment above cover the background on why the original design (#1327) is being reworked after 2.0 GA PRs feedback.
This change is required for the upcoming QLI-2.1 milestone as well.
Thank you.

@sargarram7 sargarram7 changed the title QCLINUX: arm64: dts: qcom: lemans/Monaco: Rework RTSS Mailbox DT to use syscon and staging overlays QCLINUX: arm64: dts: qcom: lemans and monaco: Rework RTSS Mailbox DT to use syscon and staging overlays Sep 5, 2026
…ee overlay"

This reverts commit 1923b1c.

The original overlay accessed the APSS TCSR mutex/status registers via
direct memory-mapped reg ranges and shipped RTSS as a standalone
lemans-rtss-mb.dtso overlay. Upstream review feedback on this design
requires:

 - Accessing the TCSR registers via a syscon phandle instead of a
   direct reg-mapped node.
 - Folding the RTSS mailbox node into the shared lemans-staging.dtso
   overlay instead of a separate, RTSS-only DTBO.

The following commits reintroduce this support using that syscon-based,
staging-overlay design.

Signed-off-by: Ram Sargar <rsargar@qti.qualcomm.com>
…ee overlay"

This reverts commit 1179022.

Same as the lemans overlay, the original Monaco overlay accessed the
APSS TCSR mutex/status registers via direct memory-mapped reg ranges
and shipped RTSS as a standalone monaco-rtss-mb.dtso overlay. Upstream
review feedback on this design requires:

 - Accessing the TCSR registers via a syscon phandle instead of a
   direct reg-mapped node.
 - Folding the RTSS mailbox node into the shared monaco-staging.dtso
   overlay instead of a separate, RTSS-only DTBO.

The following commits reintroduce this support using that syscon-based,
staging-overlay design.

Signed-off-by: Ram Sargar <rsargar@qti.qualcomm.com>
… Mailbox

Add ipcc1-ipcc4 mailbox controllers and apss_tcsr_req, apss_tcsr_resp,
apss_shared_ipc syscon nodes for Lemans platform, required by the
RTSS Mailbox device node.

Signed-off-by: Ram Sargar <rsargar@qti.qualcomm.com>
Add rtss_mailbox device node for Lemans platform, syscon-based, using
ipcc1-ipcc4 and the apss_tcsr_req/apss_tcsr_resp/apss_shared_ipc
syscon nodes.

Signed-off-by: Ram Sargar <rsargar@qti.qualcomm.com>
…ory regions

Reserve the memory regions used by the SAIL/RTSS subsystem for its
TZ mailbox, shared-memory mailbox, and OTA buffer on Monaco.

These regions back the memory-region references used by the Monaco
RTSS mailbox node (qcom,rtss-mailbox).

Signed-off-by: Ram Sargar <rsargar@qti.qualcomm.com>
… Mailbox

Add ipcc1-4 mailbox nodes and the apss_tcsr_req/apss_tcsr_resp/
apss_shared_ipc syscon nodes on Monaco.

These nodes back the syscon/mbox phandle references used by the
Monaco RTSS mailbox node (qcom,rtss-mailbox).

Signed-off-by: Ram Sargar <rsargar@qti.qualcomm.com>
Add the rtss_mailbox overlay node on Monaco, mirroring the Lemans
RTSS mailbox node added in commit 7bca28a
("QCLINUX: arm64: dts: qcom: lemans: Add RTSS Mailbox device tree node").

Signed-off-by: Ram Sargar <rsargar@qti.qualcomm.com>
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