Authors: Riccardo Fantasia, Leonardo Pantani
An introduction to the project, including the specifications and their analysis.
The description of the high-level model (C/C++ or Python)
The description of the RTL design architecture, with block diagrams, schematics (functional and/or architectural), FSM diagrams, etc ...
The description of how our module should be used in terms of how inputs should be provided (including timing) and what the corresponding output(s) would be. In practice, a kind of user manual, which may also include the waveforms at the input and/or output for several use cases (main case(s) and possible corner case(s)).
The description of how we tested the module, the testbench(es) architecture, and the test(s) we performed to verify that our module works according to the expected behavior.
The presentation of the steps performed in Quartus (including the FPGA device used), the corresponding results such as resource usage, maximum frequency, ... including comments on the results