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2026 stable 21.11.x.rusefi clean history - #68

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2026 stable 21.11.x.rusefi clean history#68
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dron0gus force-pushed the 2026_stable_21.11.x.rusefi_clean_history branch from 3cd9914 to d5a1892 Compare June 23, 2026 11:34
gdisirio and others added 28 commits July 1, 2026 12:33
Enforces the policy already documented in AGENTS.md. doc/build is
negated since it holds tracked Doxygen sources, not build artifacts.

Co-Authored-By: Claude Opus 4.8 (1M context) <noreply@anthropic.com>
Per-user debug launch configs should not be versioned. The few
intentionally-committed ones stay tracked (gitignore does not untrack);
new intentional ones can be added with 'git add -f'.

Co-Authored-By: Claude Opus 4.8 (1M context) <noreply@anthropic.com>
Make the launch-config exceptions explicit instead of implicit: the
demo/testsb/tools directories whose launch configs ship with the
project are re-included via negation, so new launch files added there
track automatically. Strays elsewhere stay ignored.

Co-Authored-By: Claude Opus 4.8 (1M context) <noreply@anthropic.com>
## Summary

- Enable STM32_HAS_FSMC for STM32G473/G483/G474/G484 devices.
- Add STM32_FSMC_HANDLER and STM32_FSMC_NUMBER aliases.
- Add rccEnableFSMC(), rccDisableFSMC(), and rccResetFSMC() helpers.

## Validation

- git diff --check stable-21.11.x..HEAD
- patch-id compared with /tmp/stm32g4-fmc.patch.zip

---------

Co-authored-by: chibios-sheriff <review@chibios.org>
rusefi#32)

🤖 This PR was prepared by the ChibiOS sheriff (assistant-operated
account) on
the maintainer's direction. It is for **human review and merge** — the
sheriff
does not review, approve or merge its own PRs.

Backport of the post-21.11.5 HAL ecosystem work from `main` onto the
`stable-21.11.x` LTS, targeting **21.11.6**. XHAL (the OOP HAL) is
intentionally
out of scope; only the `os/hal` halves of the shared fixes are applied.

1. **STM32 HAL: assorted port fixes** — RTC EXTI-clear sysHalt on H5
(rusefi#15) and
U0 (rusefi#16); STM32U3 RTC APB-clock boot-hang + bogus RTC EXTI removal (rusefi#31,
U3
only — U5 has no RTC-EXTI framework on 21.11.x); L4+/L4R
`CLK_POINT_NAMES`
comma (rusefi#21); STM32C0xx SPI2 RCC/DMAMUX (rusefi#12); ADCv6/v7 `ADC2_IRQ_HOOK`
(rusefi#11);
   SYSTICKv1 `STM32_ST_FREQUENCY_TOLERANCE` (rusefi#17).
2. **FTL templates + mcuconf regen** — `tools/ftl` bumped to the
chibios-ftl
`stable-21.11.x` line (3 mcuconf template fixes); all 244 templated
mcuconf.h
regenerated. Net: 496 insertions / 0 deletions — tolerance on every
config
   (0; 0.5% on U0/U3), F303 I2S section, C071 SPI2 (rusefi#17/rusefi#18/rusefi#19).
3. **OOP: oop_random_stream** base class (regenerated; required by VFS).
4. **tools/style: stylecheck.py** Python checker + wrappers + rusefi#28 FP
fixes
   (Perl checker left in place).
5. **VFS: current generation + ROMFS driver** — file nodes expose a
random-access stream; new read-only ROMFS driver (default off); pulls in
`os/common/utils/packbits`. Codegen is idempotent on this branch (regen
   reproduces these files byte-for-byte).
6. **style:** deterministic whitespace/comment cleanups
(HAL/common/various/lib,
   rusefi#20/rusefi#27/rusefi#29/rusefi#30), no functional change.

- **No new HAL ports introduced** — only ports already present in
21.11.5 are
  touched; the main-only `*_TEST` port dirs are excluded.
- `os/vfs/various/syscalls.c` is **left as-is**; main's newlib_bindings
reorg is
  out of scope for the backport.
- The cosmetic style pass is **partial** where 21.11.x sources have
diverged
  from main (51 files applied, 7 diverged/absent skipped).
- Compile-surface checked against the 21.11.x kernel-7 OSAL (no kernel-8
API).
  Per maintainer, hardware/build verification is done on `main`.
- Submodule `tools/ftl` points at chibios-ftl `stable-21.11.x` @
170e75b.

---------

Co-authored-by: Claude Opus 4.8 (1M context) <noreply@anthropic.com>
…23 (backport to 21.11.6) (rusefi#39)

🤖 Sheriff-prepared backport, for human review/merge.

Backport to **stable-21.11.x** (21.11.6) of github PR rusefi#34, merged on
`main` as `31e09a9b`. **HAL-only** — 21.11.x has no XHAL port.

On Cortex-M0/M0+/M23 `SCB->SHPR` is a word array driven through the
CMSIS `_SHP_IDX()`/`_BIT_SHIFT()` macros, which expect the *negative*
system exception number. `nvicSetSystemHandlerPriority()` passed the
positive ChibiOS handler index (`HANDLER_SYSTICK = 11`, …), so the
priority write hit the wrong SHPR slot — SysTick kept its reset priority
(0, highest) and SVCall's was corrupted. Converted to the matching
exception number (`handler - 12`). Affects every baseline-core port
(RP2040, STM32C0/G0/L0, STM32WL, …).

**Gates (local):** `RT-STM32L053…` (Cortex-M0+) builds clean;
`stylecheck.py` clean on changed lines. Same fix as the HW-validated
main change; HW re-confirmation on a baseline target is welcome but the
code is identical to `main`.

Co-authored-by: Claude Opus 4.8 (1M context) <noreply@anthropic.com>
…usefi#54)

🤖 Sheriff-prepared backport, for human review/merge.

Backport to **stable-21.11.x** (21.11.6) of github PR rusefi#51, merged on
`main` as `b50574e7`.

`chRegFirstThread()`/`chRegNextThread()` counted the reference they hand
out only under `CH_CFG_USE_DYNAMIC == TRUE`, while `chThdRelease()`
(always compiled) still released it — a reference-count underflow when
dynamic threads are disabled. Registry lookups now reference
unconditionally; `off_refs` is always the real offset. Also fixes NASA
OSAL `OS_TaskGetInfo()` dereferencing the thread working area before
validating the task id.

**Adaptation:** kept the 21.11.x `threadref()`/`__CH_OFFSETOF` idiom in
`chRegFirstThread()` (the main commit uses the kernel-8-only
`__CH_OWNEROF`). On 21.11.x `refs` is registry-gated and
`chThdRelease()` is always compiled, so the unconditional accounting is
sound.

**Gates (local):** `RT-STM32F407-DISCOVERY` builds clean default **and**
with `CH_CFG_USE_DYNAMIC=FALSE` (the fix's target path); stylecheck
clean on changed lines. (The RT SIM runner couldn't be built here —
Akane lacks 32-bit multilib for the 21.11.x SIMIA32 sim — unrelated to
this change.)

Co-authored-by: Claude Opus 4.8 (1M context) <noreply@anthropic.com>
…usefi#66)

🤖 chibios-sheriff — backport (advisory)

Backport of **rusefi#61** (main commit `2447f6a`) to `stable-21.11.x`.
Stable's `ch.hpp` carries the same defects, so this is a real fix
backport.

**Fixes**
- `Scheduler::rescheduleS()` now actually calls `chSchRescheduleS()`
(was a no-op function *declaration*).
- Typed `Mailbox<T>` `fetch`/`peek` no longer overrun the caller's
storage when `sizeof(T) < sizeof(msg_t)` — the **memory-corruption** fix
(fetch into a local `msg_t`, narrow on `MSG_OK`); `post`/`peek` use
value casts.
- `ObjectsPool` rounds its object size up to pointer alignment (the
free-list stores a next-pointer per slot).
- The synchronization wrappers are no longer copyable, and the
`Registry::nextThread()` reference handoff is corrected.

**Adaptation:** none — cherry-pick auto-merged cleanly (stable's
`ch.hpp` matches main's structure). The `nextThread` handoff fix is
semantically correct here because stable's registry iterators are
reference-counting since rusefi#54.

**Local gates** (stable has no CI): `RT-STM32F407-DISCOVERY-G++` builds
clean (g++ 14.3.1); a compile-only probe instantiating
`Mailbox<uint8_t,8>` and `ObjectsPool<uint8_t,4>`
(`post`/`fetch`/`alloc`) compiles clean — exercising the small-T
template fixes. (`.hpp` is not in the CI style glob.)

**Changelog:** none — `os/various/cpp_wrappers` is not changelog-tracked
(matches rusefi#61 on main, which added no entry).

Sheriff-authored backport — a human reviews/merges.

Co-authored-by: Claude Opus 4.8 (1M context) <noreply@anthropic.com>
🤖 chibios-sheriff — backport (advisory)

Backport of **rusefi#59** (main commit `0d1d4d0`) to `stable-21.11.x`.

**Fixes** (defensive guards in `drvromfs_impl.inc`)
- `romfs_chunked_read`: early return at EOF / zero-length; reject a
misbehaving chunk backend (`copied == 0` → would spin; `copied >
chunk_available` → would overrun).
- `__romfile_setpos_impl`: validate `SEEK_CUR`/`SEEK_END` bounds before
the signed `vfs_offset_t` addition.

**Adaptation:** none — cherry-pick applied cleanly.

**Local gates** (stable has no CI, and stable currently has no in-tree
VFS/ROMFS *consumer* to link-build — the driver was backported as source
in rusefi#32): `drvromfs.c` `-fsyntax-only` compiles clean against the stable
F302 header set; `stylecheck.py` clean. The change is byte-identical in
effect to rusefi#59 on `main`, which passed full CI (it compiles `drvromfs.c`
via the SB_HOST_SWITCHED demo there).

**Changelog:** none — VFS/ROMFS debuts on stable in the pending 21.11.6
(via rusefi#32), so this is pre-release refinement of an unreleased subsystem
(same call as rusefi#59 on main).

Sheriff-authored backport — a human reviews/merges.

Co-authored-by: Claude Opus 4.8 (1M context) <noreply@anthropic.com>
rusefi#64)

🤖 chibios-sheriff — backport (advisory)

Backport of **rusefi#58** (main commit `94b4303`) to `stable-21.11.x`, per the
maintainer's request on the original PR.

**Fixes**
- MFS write verification no longer compares the non-cacheable buffer
against itself when the source aliases it (read-back now uses a disjoint
buffer half; adds the `MFS_CFG_BUFFER_SIZE >= 32` `#error`).
- `MFS_CFG_STRONG_CHECKING` is honored during mount scans (default
`TRUE` → default behavior unchanged).
- A duplicate in-transaction erase no longer corrupts the used-space
accounting.

**Adaptation:** none — the cherry-pick applied cleanly (stable's MFS
matches).

**Local gates** (stable has no CI): `testhal/STM32/multi/EFL-MFS`
`stm32f302r8_nucleo64` builds clean (GCC 14.3.1); `stylecheck.py` clean
on both changed files.

Sheriff-authored backport — a human reviews/merges (the sheriff never
approves/merges its own PRs). Once merged, the `main` `readme.txt` rusefi#58
entry should gain `(backported to 21.11.6)`.

Co-authored-by: Giovanni Di Sirio <gdisirio@users.noreply.github.com>
Co-authored-by: Claude Opus 4.8 (1M context) <noreply@anthropic.com>
…usefi#70)

🤖 chibios-sheriff — backport (advisory)

Backport of **rusefi#69** (main commit `fbbfad3`) to `stable-21.11.x`.

**Fix**
- The dynamic-thread test memory pool is initialized with
`chPoolObjectInitAligned(&mp1,
THD_WORKING_AREA_SIZE(THREADS_STACK_SIZE), PORT_WORKING_AREA_ALIGN,
NULL)` instead of `chPoolObjectInit` (`PORT_NATURAL_ALIGN`), so the
pooled thread working areas meet the port's WA alignment. Source
regenerated from `test/rt/configuration.xml`.

**Adaptation:** none — cherry-pick auto-merged cleanly;
`chPoolObjectInitAligned` and `PORT_WORKING_AREA_ALIGN` are present on
stable.

**Local gates** (stable has no CI): regenerating
`rt_test_sequence_011.c` from stable's `configuration.xml` reproduces
the committed file with **zero drift**; `test/rt/testbuild` builds and
runs `Final result: SUCCESS` (rt + oslib).

**Changelog:** none — test-suite-only change (matches rusefi#69 on main).

Sheriff-authored backport — a human reviews/merges.

Co-authored-by: Claude Opus 4.8 (1M context) <noreply@anthropic.com>
Backport of the USBv1 portion of #85 to `stable-21.11.x`.

When configuration endpoints are disabled, EP0 remains active. This
resets the PMA allocator and immediately reserves EP0 IN/OUT buffers
before endpoints 1..N are rebuilt, preventing active PMA overlap. The
full bus-reset path remains unchanged.

Verification:
- applies independently to current `stable-21.11.x` tip `eb9a832bc52f`;
- ChibiOS style checker passes the changed file;
- the resulting USBv1 source is byte-identical to the source used by the
sealed tinySA RC5 dependency;
- RC5 passed repeated configuration, CDC traffic, suspend/wakeup, STALL,
reset/re-enumeration in the executable twin and USB operation on
physical hardware;
- #85 contains current-master USBv1/USBv2 build and style coverage.

Runtime evidence is USBv1-only. This is intentionally draft so
maintainers can select their preferred stable-backport workflow.
…7) (#125)

Reviewer-owned changelog entry for the USBv1 EP0 PMA backport (#87),
which did not land with that PR's merge. Added at the top of the `***
21.11.6 ***` section.

Documentation only — no code change. Pairs with the master-side entry +
`(backported to 21.11.6)` annotation in the corresponding master doc PR.

---
🤖 chibios-sheriff — first-layer review (advisory). This is an automated
first-layer patch; a human maintainer decides on merge. The sheriff does
not review or merge its own PRs.

Co-authored-by: Claude Opus 4.8 (1M context) <noreply@anthropic.com>
## Summary

Backport the STM32H7 SYSCFG reset fix to `stable-21.11.x`.
`hal_lld_init()` no longer resets SYSCFG after `stm32_clock_init()` has
configured `SYSCFG_PWRCR.ODEN`, preventing 480 MHz configurations from
losing overdrive while retaining their PLL frequency.

The issue was identified and measured in
[ArduPilot/ChibiOS#107](ArduPilot/ChibiOS#107).

## Validation

- STM32H755ZI 480 MHz HAL demo builds with `-Werror`
- repository whitespace checks pass

---------

Co-authored-by: ChibiOS Sheriff <review@chibios.org>
Co-authored-by: Claude Opus 4.8 (1M context) <noreply@anthropic.com>
Backport of #180 to `stable-21.11.x` (targeted for 21.11.6).

After a USB suspend/wakeup cycle (e.g. Windows host sleep), a Serial
over USB console on an STM32 OTG device keeps transmitting (IN) but no
longer accepts host input (OUT). `_usb_suspend()` terminates all pending
transactions and the OTG LLD disables the endpoints in hardware,
destroying the armed bulk OUT transfer; `sduWakeupHookI()` never
re-armed it. The hook now calls `sdu_start_receive()`, mirroring
`sduConfigureHookI()`. The call is fully guarded and harmless on
USBv1/USBv2 which retain endpoint state across suspend.

Identical code change as #180; readme entry adapted to the 21.11.6
section (the XHAL driver referenced there does not exist on this
branch).

🤖 Generated with [Claude Code](https://claude.com/claude-code)

Co-authored-by: Claude Fable 5 <noreply@anthropic.com>
## Summary

- Backport the legacy-shell empty-history-line guard to
`stable-21.11.x`.
- Check the line length before inspecting its final character,
preventing `save_history()` from reading `line[-1]` on an empty prompt.
- Reported by Arslan via email.

## Related

- Issue(s): None.
- Notes for reviewers: Backport of master PR #256 (master commit
`fe5fee6a13`). Keep this PR in draft and do not merge it until #256 has
landed, per the upstream-first policy.

## Target Branch Check

- [ ] This PR targets `master` — all changes land on `master` first
(upstream-first policy);
`stable-*` branches only receive maintainer-selected backports of
commits already
      merged on `master`

This PR intentionally targets `stable-21.11.x` as the dependent backport
of #256.

## Scope

- [x] Change is focused and does not bundle unrelated work
- [x] I reviewed impact on other ports/configurations where relevant

## Mechanical Checks

- [x] Style check passed on changed `.c`/`.h` files
- [x] Build check passed (POSIX simulator compile and relevant ARM
target compile)

## Testing

- [x] Test run successfully locally
- Focused AddressSanitizer reproduction reports the original
stack-buffer-underflow and passes with the reordered condition.
- `demos/various/RT-Posix-Simulator` builds with
`SHELL_USE_HISTORY=TRUE`.
- `demos/STM32/RT-STM32F429-DISCOVERY` builds with
`SHELL_USE_HISTORY=TRUE`.
- Any other tests run on a device? No.

## Compatibility and Risk

- [x] No intentional public API/ABI break
- [ ] If API/ABI changed, rationale and migration notes are provided
- [x] Risks/limitations are documented below

Risk is minimal: the backport only reorders the existing short-circuit
checks so a zero-length line returns before dereferencing the buffer.
## Summary

- Encode the OC5M and OC6M extension bit from mode bit 3 instead of bit
2.
- Restore PWM mode 1 programming for timer channels 5 and 6 on
stable-21.11.x.

## Problem

The PWM low-level driver passes mode 6 to the CCMR3 helpers. The helpers
duplicated mode bit 2 into the non-contiguous extension positions,
producing CCMR3 value 0x01016868 instead of 0x00006868.

## Testing

- Compile-time assertions for modes 6 and 8 and the complete PWM CCMR3
expression.
- make -j4 in testhal/STM32/STM32F7xx/PWM-ICU.
…#260) (#265)

Backport of #260 to `stable-21.11.x`. The ADCv4 (STM32H7) boost-level
bug is present identically on this branch.

The `#if/#elif` ladder tested the ADC clock thresholds **ascending** (`>
6.25 MHz` first), so any clock above 6.25 MHz selected `BOOST` level 1
and levels 2 and 3 were never reached — under-boosting the analog stage
for `fADC > 12.5 MHz`. ADC12 and ADC3 thresholds are now tested
descending, matching RM0433 `ADC_CR.BOOST[1:0]` (00 ≤6.25, 01 ≤12.5, 10
≤25, 11 ≤50 MHz).

Original fix by **markuspetermann** (#260); the sheriff is opening the
backport.

### Gates (run locally — stable has no CI)
- `tools/style/stylecheck.py` clean on the changed file.
- `testhal/STM32/multi/ADC` on `stm32h743zi_nucleo144` builds clean, ARM
GCC 14.3.1.
- `readme.txt` `*** 21.11.6 ***` entry added.

---
🤖 chibios-sheriff — backport opened on behalf of the author. A human
maintainer decides on merge.

Co-authored-by: Claude Opus 4.8 (1M context) <noreply@anthropic.com>
rusefi/rusefi#6781

macro hook allowing consumers to limit loops
dron0gus and others added 29 commits September 4, 2026 18:37
Instead of __func__. This should help localize problem but increase
binary size.
In case of DMA mux any DMA channel can serve any DMA souce, so no
need to check if valid channel is assigned for peripheral
If SNOR_SPI_WORKAROUND_CACHE is set to TRUE driver will to all
Tx and Rx operation thrugh internal nocache buffer
If SNOR_SPI_WORKAROUND_CACHE is set to TRUE driver will to all
Tx and Rx operation thrugh internal nocache buffer
Some SD cards need significant time for initialization.
Seems initialization happens on first read.
Windows requests the first 2 bytes of a string descriptor to read
its size before asking for the full string. This fix ensures the
firmware truncates the response data to match wLength, preventing
endpoint stalls and timeouts on strict hosts.
fdcan_clock_stop() may get stuck if TX FIFO have stalled messages
@dron0gus
dron0gus force-pushed the 2026_stable_21.11.x.rusefi_clean_history branch from d5a1892 to 29305d9 Compare September 4, 2026 19:17
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10 participants