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K7: riscv64 #8

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@tamnd

This tracks K7, riscv64. R64 defconfig boots with KUnit parity on the current set. It does not start before rucc has a riscv64 back end that passes rucc's own user program suites, and its cost leaves the back end out. The full text is in docs/plan/15-milestones.md.

Harness

  • The R64 row with qemu-system-riscv64 -M virt and OpenSBI
  • R64 baselines for 7.2.y and 6.12.y

rucc

  • The riscv64 back end (rucc's own milestone, tracked there)
  • -mcmodel=medany and correct relaxation pairs
  • The tp register, the stack protector through tp
  • .option and .insn directives

Exit criterion

  • rk test 7.2.8 --row R64 --config defconfig+test --kinds boot,smoke,kunit passes and rk config-diff is clean
  • The same for 6.12.y

Activity

  1. added this to the K7: riscv64 milestone on Sep 30, 2026
  2. tamnd commented on Oct 27, 2026

    @tamnd
    OwnerAuthor

    Progress on the riscv64 side, all on 7.2.8 defconfig built with rucc as CC:

    • #3897 and #3898 in rucc: the kernel flags (-mabi=lp64, -march, -mcmodel=medany) and asm statements kept as text with the RISC-V letters I, J, K and A.
    • #3899: the integrated assembler encodes the A extension, the CSR instructions with CSRs by name, fence.i, sfence.vma, wfi, sret and friends.
    • #3900: tp and sp as global register variables, which asm/current.h needs.
    • #3901: constant expressions in operands and .option. #3902: lpad and the shadow stack instructions for vdso_cfi.
    • #3903: .dword key - . in the jump table is an R_RISCV_ADD64 and R_RISCV_SUB64 pair against a local label, as gas writes it. GNU ld 2.42 gets the subtraction wrong when it is against a section symbol with an addend, so the label is needed.
    • #3904: Zba, Zbb, Zbs and amocas.

    The vDSO and vdso_cfi now assemble, and with COMPAT off most of the tree compiles. The compat vDSO is the open item: it is four .S files built with -march=rv32g -mabi=ilp32 and linked as ELF32, and rucc has no rv32 target yet. Until that lands the survey runs with CONFIG_COMPAT off, and the R64 row will need the same unless rv32 objects come first.

  3. tamnd commented on Oct 27, 2026

    @tamnd
    OwnerAuthor

    The riscv64 defconfig on 7.2.8 built with rucc now boots under qemu-system-riscv64 -M virt -bios default (OpenSBI 1.3 from qemu 8.2.2). It brings up both harts, runs a small asm /init that prints RUCC-RV64-INIT-OK, and powers down. The log has no warning, BUG or call trace. CONFIG_COMPAT is still off for the reason in the last comment.

    What it took since then, all in rucc:

    • #3910: a difference of two names from other sections (.long a - b in head.S) is written as an R_RISCV_ADDn and R_RISCV_SUBn pair, like gas does.
    • #3911: -mstack-protector-guard=tls -mstack-protector-guard-reg=tp -mstack-protector-guard-offset=N, so STACKPROTECTOR_PER_TASK reads the canary through tp.
    • #3912: la in assembly built without pic is lla. The early boot code in head.S used to go through a GOT that isn't set up yet, and ld refused the GOT_HI20 with an addend.
    • #3913: the sext.w in front of a 32-bit slt was being taken out because the riscv table said the compare reads only 32 bits. printf_spec.field_width is the top half of a register, so -1 compared as 0xffffffff and vsnprintf wrote off the end of its buffer before the console came up.
    • #3914: a spilled answer of the riscv select shared its scratch register with a spilled source, so pud_addr_end() returned the 1G boundary and the IRQ stack vmalloc walked past its page array in init_IRQ.

    Next up are .insn, the R64 row in rk with the defconfig+test config and KUnit, and the same boot on 6.12.y.

  4. tamnd commented on Oct 27, 2026

    @tamnd
    OwnerAuthor

    6.12.111 defconfig (COMPAT off) now boots the same way under qemu virt with OpenSBI, to RUCC-RV64-INIT-OK and a clean power down. The one file it needed beyond 7.2.8 was arch/riscv/lib/xor.S, which uses the vector integer operations, added in #3915.

  5. tamnd commented on Oct 27, 2026

    @tamnd
    OwnerAuthor

    7.2.8 on R64 now passes with rucc. Built with rk build 7.2.8 --row R64 --fragment test using rucc at tamnd/rucc 3d3b570, the rucc kernel passes boot and smoke 10 of 10 and KUnit 33 of 33, the same as gcc 13.3, with no splats that show up only in its log. rk config-diff gives 18 symbols differ, 18 explained and 0 not. All of the explained ones come from the gcc 13.3 reference against the gcc 14.2 persona (function alignment, dynamic ftrace, Zacas and Zabha), and they are listed in config-divergences.toml by #192.

    Two rucc fixes went in along the way. tamnd/rucc#3922 refuses -fcf-protection off x86 the way gcc 14 does, so RISCV_USER_CFI is no longer turned on. tamnd/rucc#3923 adds riscv64 atomics (fences, ordered loads and stores, amo, and lr/sc loops including bytes and halves), which fixes the gcov prefer-atomic probe and takes -Wa,-mno-relax. rucc never marks anything for linker relaxation, which covers the relaxation item.

    Still open here: the committed R64 baselines and the same run on 6.12.y, which is next.

  6. tamnd commented on Oct 27, 2026

    @tamnd
    OwnerAuthor

    6.12.111 on R64 passes as well. With the same rucc, rk config-diff gives 9 symbols differ, 9 explained and 0 not. Boot and smoke pass 10 of 10 and KUnit passes 10 of 10, the same as gcc, with no splats only in the rucc log. #193 teaches the baseline workflow the R64 row, and the 7.2.8 and 6.12.111 baselines are running in https://github.com/tamnd/rucc-kernel/actions/runs/40498931440. They come in by PR once they finish.

  7. tamnd commented on Oct 27, 2026

    @tamnd
    OwnerAuthor

    The R64 baselines are in with #197. 7.2.8 and 6.12.111 riscv64 defconfig with the test fragment, built three times each with riscv64-linux-gnu-gcc-14, booted all three times under TCG and gave the same image every time (7.2.8 5b312c2c9961, 6.12.111 2320a4eb5b2d). Build takes about 678 s and 400 s on a hosted runner.

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