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machine/esp32xx: wait for the I2C bus to be free before a transaction #5978

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Merged
deadprogram merged 1 commit into from
Oct 24, 2026
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machine/esp32xx: wait for the I2C bus to be free before a transaction #5978

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12 changes: 12 additions & 0 deletions src/machine/machine_esp32xx_i2c.go
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Original file line number Diff line number Diff line change
Expand Up @@ -201,6 +201,18 @@ func nanotime() int64
const i2cIntMask = esp.I2C_INT_STATUS_END_DETECT_INT_ST_Msk | esp.I2C_INT_STATUS_TRANS_COMPLETE_INT_ST_Msk | esp.I2C_INT_STATUS_TIME_OUT_INT_ST_Msk | esp.I2C_INT_STATUS_NACK_INT_ST_Msk

func (i2c *I2C) transmit(addr uint16, cmd []i2cCommand, timeoutMS int) error {
// After a NACK the controller keeps the bus busy for some microseconds.
// A start in this time does not complete and gives a timeout.
end := nanotime() + int64(timeoutMS)*1000000
for i2c.Bus.GetSR_BUS_BUSY() != 0 {
if nanotime() > end {
// Reset the FSM so a later call can recover, same as ESP-IDF
// https://github.com/espressif/esp-idf/blob/v4.4.8/components/driver/i2c.c#L1451
i2c.resetMaster()
return errI2CBusReadyTimeout
}
}

// Reset the FIFOs, bytes left after a NACK would go out in the next transaction.
// Same as ESP-IDF https://github.com/espressif/esp-idf/blob/v4.4.8/components/driver/i2c.c#L1456
i2c.Bus.SetFIFO_CONF_TX_FIFO_RST(1)
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