gshare

LEVEL: Open-source RV32IMC RISC-V processor core with pipelined microarchitecture, cache support, SoC peripherals and verification framework.

Branch Predictor Optimization for BlackParrot

Branch Predictor is a C# program that runs a gshare branch prediction simulation, according to a specified number of Global Buffer Table (GBT) and Global History Record (GHR) bits. 2019.

RISC-V pipeline research: RV32IM soft core, branch prediction (SGF), FPGA experiments + paper

Branch Prediction Simulator(Smith N-bit, Bimodal, GShare, Hybrid) implemented in Python3

gshare branch prediction implemantaion on gem5

Implementation of 4 different branch predictors in C

Fun with branch predictors

Implementation and evaluation of Pentium_m, GShare, One_bit, Bimode & Perceptron branch predictors within the Xeon X5550 Gainestown Nehalem microarchitecture

A microarchitecture simulation toolkit for analyzing modern branch prediction logic, including GShare and Perceptron. Implements cycle-accurate behavior for rigorous sensitivity analysis across ML, I/O, and general-purpose workloads. Designed to optimize processor pipeline efficiency through advanced algorithmic modeling.

The program implements GShare branch predictor.

Pure-Python simulator of classical CPU branch predictors: bimodal, gshare, and tournament, with trace-driven accuracy reporting for computer architecture education.

Computer architecture simulators for in-order and out-of-order pipelines, configurable cache hierarchies, and dynamic branch prediction

Dynamic branch predictor simulator supporting Bimodal, GShare, and Hybrid prediction schemes with 2-bit saturating counters, written in C++